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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [PATCH v7] xen: Expose the PMU to the guests
Michal Orzel writes ("[PATCH v7] xen: Expose the PMU to the guests"):
> Add parameter vpmu to xl domain configuration syntax
> to enable the access to PMU registers by disabling
> the PMU traps(currently only for ARM).
>
> The current status is that the PMU registers are not
> virtualized and the physical registers are directly
> accessible when this parameter is enabled. There is no
> interrupt support and Xen will not save/restore the
> register values on context switches.
>
> According to Arm Arm, section D7.1:
> "The Performance Monitors Extension is common
> to AArch64 operation and AArch32 operation."
> That means we have an ensurance that if PMU is
> present in one exception state, it must also be
> present in the other.
>
> Please note that this feature is experimental.
...
> Changes since v6:
> -fix missing "HVM" for vPMU entry in SUPPORT.md
The SUPPORT.md changes LGTM, thanks.
> -Virtual Performance Management Unit for HVM guests
> +Virtual Performance Management Unit
>
> - Status, x86: Supported, Not security supported
> + Status, x86 HVM: Supported, Not security supported
> + Status, ARM: Experimental
> +
> +On ARM, support for accessing PMU registers from the guests.
> +There is no interrupt support and Xen will not save/restore
> +the register values on context switches.
FTAOD ISTM that this limitation makes the feature very hard to use
successfully on ARM. You would need to pin vcpus to dedicated
pcpus ?
I think this is fine for an experimental feature.
I think this patch needs a ARM/hypervisor acks still.
Ian.
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