[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: Discussion of Xenheap problems on AArch64
On 28/04/2021 10:28, Henry Wang wrote: Hi Julien, Hi Henry, I've done some test about the patch series in https://xenbits.xen.org/gitweb/?p=people/julieng/xen-unstable.git;a=shortlog;h=refs/heads/pt/rfc-v2 Thanks you for the testing. Some questions below. Log: (XEN) VTCR_EL2: 80000000 (XEN) VTTBR_EL2: 0000000000000000 (XEN) (XEN) SCTLR_EL2: 30cd183d (XEN) HCR_EL2: 0000000000000038 (XEN) TTBR0_EL2: 000000008413d000 (XEN) (XEN) ESR_EL2: 96000041 (XEN) HPFAR_EL2: 0000000000000000 (XEN) FAR_EL2: 00008010c3fff000 (XEN) Xen call trace: (XEN) [<000000000025c7a0>] clear_page+0x10/0x2c (PC) (XEN) [<00000000002caa30>] setup_frametable_mappings+0x1ac/0x2e0 (LR) (XEN) [<00000000002cbf34>] start_xen+0x348/0xbc4 (XEN) [<00000000002001c0>] arm64/head.o#primary_switched+0x10/0x30 (XEN) (XEN) (XEN) **************************************** (XEN) Panic on CPU 0: (XEN) CPU0: Unexpected Trap: Data Abort (XEN) **************************************** 2. Apply patch and use two memory banks which have a big gap: Memory node: memory@80000000 { device_type = "memory"; reg = <0x00 0x80000000 0x00 0x7f000000 0x8800 0x00000000 0x00 0x80000000>; }; Log: (XEN) VTCR_EL2: 80000000 (XEN) VTTBR_EL2: 0000000000000000 (XEN) (XEN) SCTLR_EL2: 30cd183d (XEN) HCR_EL2: 0000000000000038 (XEN) TTBR0_EL2: 000000008413c000 (XEN) (XEN) ESR_EL2: 96000043 (XEN) HPFAR_EL2: 0000000000000000 (XEN) FAR_EL2: 0000000000443000 (XEN) (XEN) Xen call trace: (XEN) [<000000000025c7a0>] clear_page+0x10/0x2c (PC) (XEN) [<000000000026cf9c>] mm.c#xen_pt_update+0x1b8/0x7b0 (LR) (XEN) [<00000000002ca298>] setup_xenheap_mappings+0xb4/0x134 (XEN) [<00000000002cc1b0>] start_xen+0xb6c/0xbcc (XEN) [<00000000002001c0>] arm64/head.o#primary_switched+0x10/0x30 (XEN) (XEN) (XEN) **************************************** (XEN) Panic on CPU 0: (XEN) CPU0: Unexpected Trap: Data Abort (XEN) **************************************** I am a bit confused with the output with and without my patches. Both of them are showing a data abort in clear_page(). Above, you suggested that there is a big gap between the two memory banks. Are the banks still point to actual RAM? Cheers, -- Julien Grall
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