[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [PATCH v3] x86/intel: insert Ice Lake-X (server) and Ice Lake-D model numbers
On 23.12.2020 21:32, Igor Druzhinin wrote: > LBR, C-state MSRs should correspond to Ice Lake desktop according to > External Design Specification vol.2 for both models. > > Ice Lake-X is known to expose IF_PSCHANGE_MC_NO in IA32_ARCH_CAPABILITIES MSR > (confirmed on Whitley SDP) which means the erratum is fixed in hardware for > that model and therefore it shouldn't be present in has_if_pschange_mc list. > Provisionally assume the same to be the case for Ice Lake-D. I did find Ice Lake D EDS, and it confirms the respective additions. In the course I also found the "plain" Ice Lake EDS, and it seems to contradict SDM vol 4 in that it doesn't list CC3_RESIDENCY (0x3FC). For now I guess we can consider this a doc error. I didn't find Ice Lake-X EDS, though. Jan
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