[patch V2 16/46] x86/irq: Consolidate UV domain allocation

[Thomas Gleixner <tglx@xxxxxxxxxxxxx>]

From: Thomas Gleixner <tglx@xxxxxxxxxxxxx>

Move the UV specific fields into their own struct for readability sake. Get
rid of the #ifdeffery as it does not matter at all whether the alloc info
is a couple of bytes longer or not.

Signed-off-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx>

---
 arch/x86/include/asm/hw_irq.h |   21 ++++++++++++---------
 arch/x86/platform/uv/uv_irq.c |   16 ++++++++--------
 2 files changed, 20 insertions(+), 17 deletions(-)

--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -53,6 +53,14 @@ struct ioapic_alloc_info {
        struct IO_APIC_route_entry      *entry;
 };
 
+struct uv_alloc_info {
+       int             limit;
+       int             blade;
+       unsigned long   offset;
+       char            *name;
+
+};
+
 /**
  * irq_alloc_info - X86 specific interrupt allocation info
  * @type:      X86 specific allocation type
@@ -64,7 +72,8 @@ struct ioapic_alloc_info {
  * @data:      Allocation specific data
  *
  * @ioapic:    IOAPIC specific allocation data
- */
+ * @uv:                UV specific allocation data
+*/
 struct irq_alloc_info {
        enum irq_alloc_type     type;
        u32                     flags;
@@ -76,6 +85,8 @@ struct irq_alloc_info {
 
        union {
                struct ioapic_alloc_info        ioapic;
+               struct uv_alloc_info            uv;
+
                int             unused;
 #ifdef CONFIG_PCI_MSI
                struct {
@@ -83,14 +94,6 @@ struct irq_alloc_info {
                        irq_hw_number_t msi_hwirq;
                };
 #endif
-#ifdef CONFIG_X86_UV
-               struct {
-                       int             uv_limit;
-                       int             uv_blade;
-                       unsigned long   uv_offset;
-                       char            *uv_name;
-               };
-#endif
        };
 };
 
--- a/arch/x86/platform/uv/uv_irq.c
+++ b/arch/x86/platform/uv/uv_irq.c
@@ -90,15 +90,15 @@ static int uv_domain_alloc(struct irq_do
 
        ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
        if (ret >= 0) {
-               if (info->uv_limit == UV_AFFINITY_CPU)
+               if (info->uv.limit == UV_AFFINITY_CPU)
                        irq_set_status_flags(virq, IRQ_NO_BALANCING);
                else
                        irq_set_status_flags(virq, IRQ_MOVE_PCNTXT);
 
-               chip_data->pnode = uv_blade_to_pnode(info->uv_blade);
-               chip_data->offset = info->uv_offset;
+               chip_data->pnode = uv_blade_to_pnode(info->uv.blade);
+               chip_data->offset = info->uv.offset;
                irq_domain_set_info(domain, virq, virq, &uv_irq_chip, chip_data,
-                                   handle_percpu_irq, NULL, info->uv_name);
+                                   handle_percpu_irq, NULL, info->uv.name);
        } else {
                kfree(chip_data);
        }
@@ -193,10 +193,10 @@ int uv_setup_irq(char *irq_name, int cpu
 
        init_irq_alloc_info(&info, cpumask_of(cpu));
        info.type = X86_IRQ_ALLOC_TYPE_UV;
-       info.uv_limit = limit;
-       info.uv_blade = mmr_blade;
-       info.uv_offset = mmr_offset;
-       info.uv_name = irq_name;
+       info.uv.limit = limit;
+       info.uv.blade = mmr_blade;
+       info.uv.offset = mmr_offset;
+       info.uv.name = irq_name;
 
        return irq_domain_alloc_irqs(domain, 1,
                                     uv_blade_to_memory_nid(mmr_blade), &info);