[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [patch RFC 38/38] irqchip: Add IMS array driver - NOT FOR MERGING
- To: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
- From: Jason Gunthorpe <jgg@xxxxxxxxxx>
- Date: Fri, 21 Aug 2020 09:45:47 -0300
- Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nvidia.com; dmarc=pass action=none header.from=nvidia.com; dkim=pass header.d=nvidia.com; arc=none
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=S/r45NtRV2mWSwf7qjxe4p+L5bNQhEDLKcj6MRy1GZY=; b=evGBf2zmiTrwkGakIKRpLZJIavBoMH/xJQ39k33OJVN1lh3Hvvjn/d/KY4Mv9mvNYkWF1nF/MagKkRb6sNsBooTvNQClCHGNqkbye6CId663c0ZyAfdtL0qX1GVDzDG1zBpyHvHN0llyeHvOGLoIOO0VUOz6hEvQakPIbrpjZ1w74piCh4qur1OBvQk1CyPc0WaPvj51NuZG4WPcoZd520XlcRxv0QlpB0oxEA4U8ZFqpVODyvecbtX55w7tnj9sg3HNmapAps1B74E3ebBy1Erxq1QpjYhqw0DOg6cvxTdvEktzgQ4FabWV/tfDDenWkrQpv/lqRsS0pazwilVl7g==
- Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Py9ewiDH8EpfOU/AGCbhXdH876ONWFt9/IJp2y78uyzcc9bvi/OYw3HhLNdbHgPnDtT46XJSkhQ/EnIToSrGgwbfbVHR7EGZAJai+9wk8XMHMnFeQVycyzKeCmRQxqGrp2hku5bm+jHrxdlltkJt1XJ38s+JSK6S216wZuLChNij4WjdqjSw1NuJGOgQzfWfJdukKRbplhwIZMXHXdbUiB3Il6vVZq4Hfmk4f9Szuc9G6xpR5s/skhU1O+a1FzYabtKzL6i6k8V22Rg2y5XTF0MtxvAU11cUjafthVS7hyz5ocAApuPjiuZuW7OSeU4SP2DGrmraRtN2FpEw4aYr1g==
- Authentication-results: linutronix.de; dkim=none (message not signed) header.d=none;linutronix.de; dmarc=none action=none header.from=nvidia.com;
- Cc: LKML <linux-kernel@xxxxxxxxxxxxxxx>, <x86@xxxxxxxxxx>, Marc Zyngier <maz@xxxxxxxxxx>, Megha Dey <megha.dey@xxxxxxxxx>, Dave Jiang <dave.jiang@xxxxxxxxx>, Alex Williamson <alex.williamson@xxxxxxxxxx>, "Jacob Pan" <jacob.jun.pan@xxxxxxxxx>, Baolu Lu <baolu.lu@xxxxxxxxx>, Kevin Tian <kevin.tian@xxxxxxxxx>, Dan Williams <dan.j.williams@xxxxxxxxx>, Joerg Roedel <joro@xxxxxxxxxx>, <iommu@xxxxxxxxxxxxxxxxxxxxxxxxxx>, <linux-hyperv@xxxxxxxxxxxxxxx>, Haiyang Zhang <haiyangz@xxxxxxxxxxxxx>, "Jon Derrick" <jonathan.derrick@xxxxxxxxx>, Lu Baolu <baolu.lu@xxxxxxxxxxxxxxx>, Wei Liu <wei.liu@xxxxxxxxxx>, "K. Y. Srinivasan" <kys@xxxxxxxxxxxxx>, Stephen Hemminger <sthemmin@xxxxxxxxxxxxx>, Steve Wahl <steve.wahl@xxxxxxx>, Dimitri Sivanich <sivanich@xxxxxxx>, Russ Anderson <rja@xxxxxxx>, <linux-pci@xxxxxxxxxxxxxxx>, Bjorn Helgaas <bhelgaas@xxxxxxxxxx>, Lorenzo Pieralisi <lorenzo.pieralisi@xxxxxxx>, Konrad Rzeszutek Wilk <konrad.wilk@xxxxxxxxxx>, <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Juergen Gross <jgross@xxxxxxxx>, "Boris Ostrovsky" <boris.ostrovsky@xxxxxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>, "Rafael J. Wysocki" <rafael@xxxxxxxxxx>
- Delivery-date: Fri, 21 Aug 2020 13:00:02 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On Fri, Aug 21, 2020 at 02:25:02AM +0200, Thomas Gleixner wrote:
> +static void ims_mask_irq(struct irq_data *data)
> +{
> + struct msi_desc *desc = irq_data_get_msi_desc(data);
> + struct ims_array_slot __iomem *slot = desc->device_msi.priv_iomem;
> + u32 __iomem *ctrl = &slot->ctrl;
> +
> + iowrite32(ioread32(ctrl) & ~IMS_VECTOR_CTRL_UNMASK, ctrl);
Just to be clear, this is exactly the sort of operation we can't do
with non-MSI interrupts. For a real PCI device to execute this it
would have to keep the data on die.
I saw the idxd driver was doing something like this, I assume it
avoids trouble because it is a fake PCI device integrated with the
CPU, not on a real PCI bus?
It is really nice to see irq_domain used properly in x86!
Thanks,
Jason
|