[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] RE: [PATCH v4 03/14] x86/iommu: convert VT-d code to use new page table allocator
> -----Original Message----- [snip] > > -static void iommu_free_page_table(struct page_info *pg) > > -{ > > - unsigned int i, next_level = PFN_ORDER(pg) - 1; > > - u64 pt_maddr = page_to_maddr(pg); > > - struct dma_pte *pt_vaddr, *pte; > > - > > - PFN_ORDER(pg) = 0; > > - pt_vaddr = (struct dma_pte *)map_vtd_domain_page(pt_maddr); > > - > > - for ( i = 0; i < PTE_NUM; i++ ) > > - { > > - pte = &pt_vaddr[i]; > > - if ( !dma_pte_present(*pte) ) > > - continue; > > - > > - if ( next_level >= 1 ) > > - iommu_free_pagetable(dma_pte_addr(*pte), next_level); > > - > > - dma_clear_pte(*pte); > > - iommu_sync_cache(pte, sizeof(struct dma_pte)); > > I didn't see sync_cache in the new iommu_free_pgtables. Is it intended > (i.e. original flush is meaningless) or overlooked? > The original v1 combined patch had the comment: NOTE: There is no need to clear and sync PTEs during teardown since the per- device root entries will have already been cleared (when devices were de-assigned) so the page tables can no longer be accessed by the IOMMU. I should have included that note in this one. I'll fix in v5. Paul > Thanks > Kevin
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