[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [PATCH v4 02/10] x86/vmx: add IPT cpu feature
On 01/07/2020 16:12, Julien Grall wrote: > On 30/06/2020 13:33, Michał Leszczyński wrote: >> @@ -305,7 +311,6 @@ static int vmx_init_vmcs_config(void) >> SECONDARY_EXEC_ENABLE_VIRT_EXCEPTIONS | >> SECONDARY_EXEC_XSAVES | >> SECONDARY_EXEC_TSC_SCALING); >> - rdmsrl(MSR_IA32_VMX_MISC, _vmx_misc_cap); >> if ( _vmx_misc_cap & VMX_MISC_VMWRITE_ALL ) >> opt |= SECONDARY_EXEC_ENABLE_VMCS_SHADOWING; >> if ( opt_vpid_enabled ) >> diff --git a/xen/common/domain.c b/xen/common/domain.c >> index 7cc9526139..0a33e0dfd6 100644 >> --- a/xen/common/domain.c >> +++ b/xen/common/domain.c >> @@ -82,6 +82,8 @@ struct vcpu *idle_vcpu[NR_CPUS] __read_mostly; >> vcpu_info_t dummy_vcpu_info; >> +bool_t vmtrace_supported; > > All the code looks x86 specific. So may I ask why this was implemented > in common code? There were some questions directed specifically at the ARM maintainers about CoreSight, which have gone unanswered. ~Andrew
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