[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [PATCH for-4.14 3/8] x86/hvm: fix ISA IRQ 0 handling when set as lowest priority mode in IO APIC
Lowest priority destination mode does allow the vIO APIC code to select a vCPU to inject the interrupt to, but the selected vCPU must be part of the possible destinations configured for such IO APIC pin. Fix the code in order to only force vCPU 0 if it's part of the listed destinations. Signed-off-by: Roger Pau Monné <roger.pau@xxxxxxxxxx> --- xen/arch/x86/hvm/vioapic.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/hvm/vioapic.c b/xen/arch/x86/hvm/vioapic.c index 67472e5934..e1417cc6a7 100644 --- a/xen/arch/x86/hvm/vioapic.c +++ b/xen/arch/x86/hvm/vioapic.c @@ -422,12 +422,13 @@ static void vioapic_deliver(struct hvm_vioapic *vioapic, unsigned int pin) case dest_LowestPrio: { #ifdef IRQ0_SPECIAL_ROUTING - /* Force round-robin to pick VCPU 0 */ - if ( (irq == hvm_isa_irq_to_gsi(0)) && pit_channel0_enabled() ) - { - v = d->vcpu ? d->vcpu[0] : NULL; - target = v ? vcpu_vlapic(v) : NULL; - } + struct vlapic *lapic0 = vcpu_vlapic(d->vcpu[0]); + + /* Force to pick vCPU 0 if part of the destination list */ + if ( (irq == hvm_isa_irq_to_gsi(0)) && pit_channel0_enabled() && + vlapic_match_dest(lapic0, NULL, 0, dest, dest_mode) && + vlapic_enabled(lapic0) ) + target = lapic0; else #endif target = vlapic_lowest_prio(d, NULL, 0, dest, dest_mode); -- 2.26.2
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