[Xen-devel] [PATCH] x86/apic: Improve current_local_apic_mode()

[Andrew Cooper <andrew.cooper3@xxxxxxxxxx>]

boot_cpu_has(X86_FEATURE_X2APIC) doesn't need checking to interpret
APIC_BASE_EXTD.

Also take the opportunity to optimise the generated assembly by not using
rdmsrl().  GCC isn't clever enough to spot that it can drop the shift and or
to put %eax in the higher half of msr_contents.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
---
CC: Jan Beulich <JBeulich@xxxxxxxx>
CC: Wei Liu <wl@xxxxxxx>
CC: Roger Pau Monné <roger.pau@xxxxxxxxxx>

What can I say - the numpty who wrote that code was young and naive...
---
 xen/arch/x86/apic.c | 12 ++++--------
 1 file changed, 4 insertions(+), 8 deletions(-)

diff --git a/xen/arch/x86/apic.c b/xen/arch/x86/apic.c
index a6a7754d77..0684c5d9c2 100644
--- a/xen/arch/x86/apic.c
+++ b/xen/arch/x86/apic.c
@@ -1534,18 +1534,14 @@ void __init record_boot_APIC_mode(void)
 /* Look at the bits in MSR_APIC_BASE and work out which APIC mode we are in */
 enum apic_mode current_local_apic_mode(void)
 {
-    u64 msr_contents;
+    uint32_t high, low;
 
-    rdmsrl(MSR_APIC_BASE, msr_contents);
+    rdmsr(MSR_APIC_BASE, low, high);
 
-    /* Reading EXTD bit from the MSR is only valid if CPUID
-     * says so, else reserved */
-    if ( boot_cpu_has(X86_FEATURE_X2APIC) && (msr_contents & APIC_BASE_EXTD) )
+    if ( low & APIC_BASE_EXTD )
         return APIC_MODE_X2APIC;
 
-    /* EN bit should always be valid as long as we can read the MSR
-     */
-    if ( msr_contents & APIC_BASE_ENABLE )
+    if ( low & APIC_BASE_ENABLE )
         return APIC_MODE_XAPIC;
 
     return APIC_MODE_DISABLED;
-- 
2.11.0


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