Re: [Xen-devel] [PATCH v3 7/8] x86/HVM: don't needlessly intercept APERF/MPERF/TSC MSR reads

["Tian, Kevin" <kevin.tian@xxxxxxxxx>]

> From: Jan Beulich <jbeulich@xxxxxxxx>
> Sent: Monday, January 20, 2020 4:33 PM
> 
> On 19.01.2020 03:44, Tian, Kevin wrote:
> >> From: Jan Beulich <jbeulich@xxxxxxxx>
> >> Sent: Tuesday, January 7, 2020 12:39 AM
> >>
> >> If the hardware can handle accesses, we should allow it to do so. This
> >> way we can expose EFRO to HVM guests, and "all" that's left for exposing
> >> APERF/MPERF is to figure out how to handle writes to these MSRs. (Note
> >> that the leaf 6 guest CPUID checks will evaluate to false for now, as
> >> recalculate_misc() zaps the entire leaf for now.)
> >>
> >> For TSC the intercepts are made mirror the RDTSC ones.
> >>
> >> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
> >
> > Reviewed-by: Kevin Tian <kevin.tian@xxxxxxxxx>
> 
> Thanks. I assume you've seen Andrew's comment, and hence I take it
> that the R-b also applies to the adjusted version (not posted yet):

sorry I'm not sure which comment is referred here. If you will
anyway send out a new version, please drop my R-b and I will
double check again though the below version alone looks good.

> 
> --- a/xen/arch/x86/hvm/vmx/vmcs.c
> +++ b/xen/arch/x86/hvm/vmx/vmcs.c
> @@ -1140,8 +1140,13 @@ static int construct_vmcs(struct vcpu *v
>          vmx_clear_msr_intercept(v, MSR_IA32_SYSENTER_CS, VMX_MSR_RW);
>          vmx_clear_msr_intercept(v, MSR_IA32_SYSENTER_ESP, VMX_MSR_RW);
>          vmx_clear_msr_intercept(v, MSR_IA32_SYSENTER_EIP, VMX_MSR_RW);
> +
> +        if ( !(v->arch.hvm.vmx.exec_control & CPU_BASED_RDTSC_EXITING) )
> +            vmx_clear_msr_intercept(v, MSR_IA32_TSC, VMX_MSR_R);
> +
>          if ( paging_mode_hap(d) && (!is_iommu_enabled(d) || iommu_snoop) )
>              vmx_clear_msr_intercept(v, MSR_IA32_CR_PAT, VMX_MSR_RW);
> +
>          if ( (vmexit_ctl & VM_EXIT_CLEAR_BNDCFGS) &&
>               (vmentry_ctl & VM_ENTRY_LOAD_BNDCFGS) )
>              vmx_clear_msr_intercept(v, MSR_IA32_BNDCFGS, VMX_MSR_RW);
> 
> plus this extra vmx.c hunk:
> 
> @@ -1249,7 +1261,12 @@ static void vmx_set_rdtsc_exiting(struct
>      vmx_vmcs_enter(v);
>      v->arch.hvm.vmx.exec_control &= ~CPU_BASED_RDTSC_EXITING;
>      if ( enable )
> +    {
>          v->arch.hvm.vmx.exec_control |= CPU_BASED_RDTSC_EXITING;
> +        vmx_set_msr_intercept(v, MSR_IA32_TSC, VMX_MSR_R);
> +    }
> +    else
> +        vmx_clear_msr_intercept(v, MSR_IA32_TSC, VMX_MSR_R);
>      vmx_update_cpu_exec_control(v);
>      vmx_vmcs_exit(v);
>  }
> 
> Jan
_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxxxxxxxxx
https://lists.xenproject.org/mailman/listinfo/xen-devel