Re: [Xen-devel] [PATCH for-4.13 2/6] xen/arm64: bitops: Match the register size with the value size in flsl

[Stefano Stabellini <sstabellini@xxxxxxxxxx>]

On Wed, 2 Oct 2019, Julien Grall wrote:
> Clang is pickier than GCC for the register size in asm statement. It expects
> the register size to match the value size.
> 
> The instruction clz is expecting the two operands to be the same size
> (i.e 32-bit or 64-bit). As the flsl function is dealing with 64-bit
> value, we need to make the destination variable 64-bit as well.
> 
> While at it, add a newline before the return statement.
> 
> Note that the return type of flsl is not updated because the result will
> always be smaller than 64 and therefore fit in 32-bit.
> 
> Signed-off-by: Julien Grall <julien.grall@xxxxxxx>

Acked-by: Stefano Stabellini <sstabellini@xxxxxxxxxx>


> ---
>     Changes in v2:
>         - Update the commit message to explain why the return type is
>         not modified
> ---
>  xen/include/asm-arm/arm64/bitops.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/xen/include/asm-arm/arm64/bitops.h 
> b/xen/include/asm-arm/arm64/bitops.h
> index 6cc224ad13..d85a49bca4 100644
> --- a/xen/include/asm-arm/arm64/bitops.h
> +++ b/xen/include/asm-arm/arm64/bitops.h
> @@ -24,12 +24,13 @@ static /*__*/always_inline unsigned long __ffs(unsigned 
> long word)
>  
>  static inline int flsl(unsigned long x)
>  {
> -        int ret;
> +        uint64_t ret;
>  
>          if (__builtin_constant_p(x))
>                 return generic_flsl(x);
>  
>          asm("clz\t%0, %1" : "=r" (ret) : "r" (x));
> +
>          return BITS_PER_LONG - ret;
>  }
>  
> -- 
> 2.11.0
> 

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