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Re: [Xen-devel] [PATCH RFC] pass-through: sync pir to irr after msix vector been updated



On 24.09.2019 00:29, Joe Jin wrote:
> On 9/20/19 1:28 AM, Jan Beulich wrote:
>> On 19.09.2019 23:38, Joe Jin wrote:
>>> On 9/19/19 3:24 AM, Jan Beulich wrote:
>>>> What's
>>>> still missing is the further updating of pirq_dpci->gmsi.dest_vcpu_id
>>>> (as explained before, still visible in context above).
>>>>
>>>
>>>  422
>>>  423         dest_vcpu_id = hvm_girq_dest_2_vcpu_id(d, dest, dest_mode);
>>>  424         pirq_dpci->gmsi.dest_vcpu_id = dest_vcpu_id;
>>>
>>> dest_vcpu_id updated later by above code, do I missed something?
>>
>> This piece of code
>>
>>         if ( iommu_intpost )
>>         {
>>             if ( delivery_mode == dest_LowestPrio )
>>                 vcpu = vector_hashing_dest(d, dest, dest_mode,
>>                                            pirq_dpci->gmsi.gvec);
>>             if ( vcpu )
>>                 pirq_dpci->gmsi.posted = true;
>>         }
>>
>> updates the vCPU to be delivered to. Right now, when the "posted"
>> flag is set, the dest_vcpu_id field is unused (as far as I was
>> able to tell), and hence didn't need setting. The way you intend
>> to change things, you want to use the field also in the "posted"
>> case, and hence you also should update it in the code path above.
>>
>> But please double check all of this.
> 
> Thanks for your explanation.
> 
> I did not found any other possible conditions which may lead invalid
> setting, seems ( dest_vcpu_id >=0 && pirq_dpci->gmsi.posted ) is enough?

I thought we had settled on this side of things a number of roundtrips
ago.

Jan

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