Re: [Xen-devel] [PATCH v8 48/50] x86emul: add an AES/VAES test case to the harness

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 21.06.19 at 15:36, <andrew.cooper3@xxxxxxxxxx> wrote:
> On 15/03/2019 11:07, Jan Beulich wrote:
>> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
> 
> This feels like it should be folded with patch 45 (or perhaps easier, 45
> moved later and folded into this one.  The exact ordering of patches
> really doesn't matter).

Not really imo - we've had AESNI support even before this series.
Test harness coverage for everything gets added here. Apart
from this the late placement in the series is attributed to its history:
It took me a while after having finished the main AVX512 work to
find time to actually come up with at least marginally sensible tests
here.

I'd prefer if things remained split the way they are.

>> @@ -91,6 +95,16 @@ static bool simd_check_xop(void)
>>      return cpu_has_xop;
>>  }
>>  
>> +static bool simd_check_ssse3_aes(void)
>> +{
>> +    return cpu_has_aesni && cpu_has_ssse3;
>> +}
>> +
>> +static bool simd_check_avx_aes(void)
>> +{
>> +    return cpu_has_aesni && cpu_has_avx;
>> +}
>> +
>>  static bool simd_check_avx512f(void)
>>  {
>>      return cpu_has_avx512f;
>> @@ -141,6 +155,22 @@ static bool simd_check_avx512vbmi_vl(voi
>>      return cpu_has_avx512_vbmi && cpu_has_avx512vl;
>>  }
>>  
>> +static bool simd_check_avx2_vaes(void)
>> +{
>> +    return cpu_has_aesni && cpu_has_vaes && cpu_has_avx2;
>> +}
>> +
>> +static bool simd_check_avx512bw_vaes(void)
>> +{
>> +    return cpu_has_aesni && cpu_has_vaes && cpu_has_avx512bw;
>> +}
>> +
>> +static bool simd_check_avx512bw_vaes_vl(void)
>> +{
>> +    return cpu_has_aesni && cpu_has_vaes &&
>> +           cpu_has_avx512bw && cpu_has_avx512vl;
>> +}
> 
> I've got the same concerns WRT feature tests as with the previous
> patch.  Everything else LGTM.

Right - let's settle on that aspect there first.

Jan



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