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Re: [Xen-devel] [PATCH v8 44/50] x86emul: support VPCLMULQDQ insns
- To: Jan Beulich <JBeulich@xxxxxxxx>, xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
- Date: Fri, 21 Jun 2019 13:52:33 +0100
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- Cc: George Dunlap <George.Dunlap@xxxxxxxxxxxxx>, Wei Liu <wei.liu2@xxxxxxxxxx>, Roger Pau Monne <roger.pau@xxxxxxxxxx>
- Delivery-date: Fri, 21 Jun 2019 12:52:48 +0000
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On 15/03/2019 11:05, Jan Beulich wrote:
> As to the feature dependency adjustment, while strictly speaking AVX is
> a sufficient prereq (to have YMM registers), 256-bit vectors of integers
> have got fully introduced with AVX2 only. Sadly gcc can't be used as a
> reference here: They don't provide any AVX512-independent built-in at
> all.
>
> Along the lines of PCLMULQDQ, since the insns here and in particular
> their memory access patterns follow the usual scheme, I didn't think it
> was necessary to add a contrived test specifically for them, beyond the
> Disp8 scaling one.
>
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
> ---
> TBD: Should VPCLMULQDQ also depend on PCLMULQDQ?
I think so, yes. These are all 64 by 64 multiplies with a 128 bit
result, and an imm8 to choose which quadwords get used, so both these
features will be using the silicon block in the vector pipeline. The
only difference is whether its wired through from the legacy SSE
instructions, or the [E]VEX instructions.
I certainly don't expect to ever see hardware with VPCLMULQDQ but
lacking PCLMULQDQ.
> --- a/xen/tools/gen-cpuid.py
> +++ b/xen/tools/gen-cpuid.py
> @@ -255,8 +255,9 @@ def crunch_numbers(state):
>
> # This is just the dependency between AVX512 and AVX2 of XSTATE
> # feature flags. If want to use AVX512, AVX2 must be supported and
> - # enabled.
> - AVX2: [AVX512F],
> + # enabled. Certain later extensions, acting on 256-bit vectors of
> + # integers, better depend on AVX2 than AVX.
> + AVX2: [AVX512F, VPCLMULQDQ],
Hmm - this is awkward, because in practice, there won't be any hardware
in existence with VPCLMULQDQ and AVX2 but lacking AVX512.
However, the VEX encoding is legitimate in the absence of the EVEX
encoding, and doesn't depend on the AVX512 XCR0 state.
Acked-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
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