[Xen-devel] [PATCH] Add Undervolt MSRs to wrmsr function.

[Dylanger Daly <dylanger@xxxxxxxxxxx>]

Giving Laptop Users the ability to Undervolt and change Temp Throttle Limits.

Signed-off-by: Dylanger Daly <dylanger@xxxxxxxxxxx>
---
 xen/arch/x86/traps.c            | 8 ++++++++
 xen/include/asm-x86/msr-index.h | 2 ++
 2 files changed, 10 insertions(+)

diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index 1a22895907..475a2a5720 100644
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -2684,6 +2684,14 @@ static int priv_op_write_msr(unsigned int reg, uint64_t 
val,
             goto invalid;
         return X86EMUL_OKAY;
 
+    case MSR_IA32_VOLTAGE_OFFSET:
+    case MSR_IA32_TEMP_CONTROL:
+        if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL )
+            break;
+        if ( wrmsr_safe(reg, val) == 0 )
+            return X86EMUL_OKAY;
+        break;
+
     case MSR_IA32_MISC_ENABLE:
         if ( rdmsr_safe(reg, temp) )
             break;
diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index 7bb382f456..75dad3fe43 100644
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -346,6 +346,8 @@
 #define MSR_IA32_THERM_INTERRUPT       0x0000019b
 #define MSR_IA32_THERM_STATUS          0x0000019c
 #define MSR_IA32_MISC_ENABLE           0x000001a0
+#define MSR_IA32_VOLTAGE_OFFSET                0x00000150
+#define MSR_IA32_TEMP_CONTROL          0x000001a2
 #define MSR_IA32_MISC_ENABLE_PERF_AVAIL   (1<<7)
 #define MSR_IA32_MISC_ENABLE_BTS_UNAVAIL  (1<<11)
 #define MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL (1<<12)
-- 
2.20.1


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