[Xen-devel] MCE/EDAC Status/Updating?

[Elliott Mitchell <ehem+xen@xxxxxxx>]

The MCE/EDAC support code appears to be in rather poor shape.

The AMD code mentions Family 10h, which might have been available 10
years ago.  They've likely been findable used with difficulty more
recently, but no hardware made in the past 5 years matches this profile.

The Intel code has had some more recent minor updates.  Intel may have
managed to keep their hardware supporting the interface used by Xen, and
so the driver /may/ function on current Intel hardware.

Looks like both drivers originated with employees of the respective
companies (I'm suspecting both were paid for by the corporations).


Given the recent trends in Xen's development I'd tend to suggest going a
different direction from the existing code.  The existing code was
attempting to handle MCE/EDAC errors by emulating them and passing them
to the effected domain.  Instead of this approach, let Domain 0 handle
talking to MCE/EDAC hardware and merely have Xen decode addresses.

If errors/warnings are occuring, you need those reports centralized,
which points to handling them in Domain 0.  If an uncorrectable error
occurs, Domain 0 should choose whether to kill a given VM or panic the
entire machine.  Either way, Domain 0 really needs to be alerted that
hardware is misbehaving and may need to be replaced.

The other part is alerting Domain 0 is *far* more likely to get the
correct type of attention.  A business owning a Domain U on a random
machine, may run a kernel without MCE/EDAC support or could miss the
entries in their system log, nor would they necessarily know the correct
personel to contact about hardware failing.

The case you would want to pass MCE/EDAC messages would be to a HVM
domain where you were testing a new system image.  Then you would likely
be injecting fake exceptions instead of real ones.  At which point we're
talking QEMU, rather than Xen.


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