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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH 6/6] x86: introduce dr_mask_idx() helper function...
...to avoid repeated open-coding.
Unfortunately the mapping from MSR index MSR_AMD64_DR<idx>_ADDRESS_MASK
to the 'idx' value is non-trivial since the MSR index corresponding to
idx value 0 is non-consecutive with the MSR indices corresponding to
idx values 1-3. This mapping is currently dealt with by near-identical
open coding in guest_rdmsr() and guest_wrmsr().
This patch adds a helper function, dr_mask_idx(), to handle the mapping
and then uses this in guest_rdmsr() and guest_wrmsr() instead, thus
making the code somewhat neater.
Signed-off-by: Paul Durrant <paul.durrant@xxxxxxxxxx>
---
Cc: Jan Beulich <jbeulich@xxxxxxxx>
Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
Cc: Wei Liu <wei.liu2@xxxxxxxxxx>
Cc: "Roger Pau Monné" <roger.pau@xxxxxxxxxx>
---
xen/arch/x86/msr.c | 18 +++++-------------
xen/include/asm-x86/msr.h | 21 +++++++++++++++++++++
2 files changed, 26 insertions(+), 13 deletions(-)
diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c
index 3aa79031cf..4e4c9c805a 100644
--- a/xen/arch/x86/msr.c
+++ b/xen/arch/x86/msr.c
@@ -21,7 +21,6 @@
#include <xen/init.h>
#include <xen/lib.h>
-#include <xen/nospec.h>
#include <xen/sched.h>
#include <asm/debugreg.h>
@@ -121,7 +120,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val)
const struct domain *d = v->domain;
const struct cpuid_policy *cp = d->arch.cpuid;
const struct msr_policy *mp = d->arch.msr;
- const struct vcpu_msrs *msrs = v->arch.msrs;
+ struct vcpu_msrs *msrs = v->arch.msrs;
int ret = X86EMUL_OKAY;
switch ( msr )
@@ -202,13 +201,10 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t
*val)
*/
#ifdef CONFIG_HVM
if ( v == current && is_hvm_domain(d) && v->arch.hvm.flag_dr_dirty )
- rdmsrl(msr, *val);
- else
+ rdmsrl(msr, msrs->dr_mask[dr_mask_idx(msr)]);
#endif
- *val = msrs->dr_mask[
- array_index_nospec((msr == MSR_AMD64_DR0_ADDRESS_MASK)
- ? 0 : (msr - MSR_AMD64_DR1_ADDRESS_MASK +
1),
- ARRAY_SIZE(msrs->dr_mask))];
+
+ *val = msrs->dr_mask[dr_mask_idx(msr)];
break;
default:
@@ -377,11 +373,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val)
if ( !cp->extd.dbext || val != (uint32_t)val )
goto gp_fault;
- msrs->dr_mask[
- array_index_nospec((msr == MSR_AMD64_DR0_ADDRESS_MASK)
- ? 0 : (msr - MSR_AMD64_DR1_ADDRESS_MASK + 1),
- ARRAY_SIZE(msrs->dr_mask))] = val;
-
+ msrs->dr_mask[dr_mask_idx(msr)] = val;
if ( v == curr && (curr->arch.dr7 & DR7_ACTIVE_MASK) )
wrmsrl(msr, val);
break;
diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h
index e9c685613e..5eb5e6dace 100644
--- a/xen/include/asm-x86/msr.h
+++ b/xen/include/asm-x86/msr.h
@@ -5,6 +5,7 @@
#ifndef __ASSEMBLY__
+#include <xen/nospec.h>
#include <xen/types.h>
#include <xen/percpu.h>
#include <xen/errno.h>
@@ -317,6 +318,26 @@ struct vcpu_msrs
} xss;
};
+static inline unsigned int dr_mask_idx(uint32_t msr)
+{
+ switch (msr)
+ {
+ default:
+ ASSERT_UNREACHABLE();
+ /* Fallthrough */
+ case MSR_AMD64_DR0_ADDRESS_MASK:
+ return 0;
+
+ case MSR_AMD64_DR1_ADDRESS_MASK ... MSR_AMD64_DR3_ADDRESS_MASK:
+ {
+ struct vcpu_msrs msrs; /* only used for ARRAY_SIZE() */
+
+ return array_index_nospec(msr - MSR_AMD64_DR1_ADDRESS_MASK + 1,
+ ARRAY_SIZE(msrs.dr_mask));
+ }
+ }
+}
+
void init_guest_msr_policy(void);
int init_domain_msr_policy(struct domain *d);
int init_vcpu_msr_policy(struct vcpu *v);
--
2.20.1
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