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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v6 4/6] xen/arm: zynqmp: implement zynqmp_eemi
Hi, On 14/12/2018 19:11, Stefano Stabellini wrote: From: "Edgar E. Iglesias" <edgar.iglesias@xxxxxxxxxx> From: Edgar E. Iglesias <edgar.iglesias@xxxxxxxxxx> zynqmp_eemi uses the defined functions and structs to decide whether to make a call to the firmware, or to simply return a predefined value. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xxxxxxxxxx> Signed-off-by: Stefano Stabellini <stefanos@xxxxxxxxxx> --- Changes in v6: - mmio_access removal moved to previous patch - forward to firmware mandatory smc32 calls - check that the function id belongs to the right range before proceeding - basic is_hardware_domain implementation for domain_has_node_access and domain_has_reset_access Changes in v5: - remove mmio_access handling Changes in v4: - add #include as needed - improve comment - code style --- xen/arch/arm/platforms/xilinx-zynqmp-eemi.c | 180 +++++++++++++++++++++++++++- 1 file changed, 179 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/platforms/xilinx-zynqmp-eemi.c b/xen/arch/arm/platforms/xilinx-zynqmp-eemi.c index 369bb3f..e0456ae 100644 --- a/xen/arch/arm/platforms/xilinx-zynqmp-eemi.c +++ b/xen/arch/arm/platforms/xilinx-zynqmp-eemi.c @@ -17,11 +17,189 @@ */#include <asm/regs.h>+#include <xen/sched.h> +#include <asm/smccc.h> #include <asm/platforms/xilinx-zynqmp-eemi.h>+/*+ * EEMI firmware API: + * https://www.xilinx.com/support/documentation/user_guides/ug1200-eemi-api.pdf + * + * Power domain node_ids identify the area of effect of the power + * management operations. They are the first parameter passed to power + * management EEMI calls. + * + * Reset IDs identify the area of effect of a reset operation. They are + * the first parameter passed to reset EEMI calls. + * + * For now, let the hardware domain access to all power domain nodes and + * all reset lines. In the future, we'll check for ownership of + * resources by specific virtual machines. + */ +static inline bool domain_has_node_access(struct domain *d, uint32_t nodeid) +{ + return is_hardware_domain(d); +} + +static inline bool domain_has_reset_access(struct domain *d, uint32_t rst) +{ + return is_hardware_domain(d); +} + bool zynqmp_eemi(struct cpu_user_regs *regs) { - return false; + struct arm_smccc_res res; + uint32_t fid = get_user_reg(regs, 0); + uint32_t nodeid; + unsigned int pm_fn; + enum pm_ret_status ret; + + /* Check for the mandatory SMC32 functions first */ + switch ( fid ) + { + case ARM_SMCCC_CALL_COUNT_FID(SIP): + case ARM_SMCCC_CALL_UID_FID(SIP): + case ARM_SMCCC_REVISION_FID(SIP): + goto forward_to_fw; + default: + break; + } + + /* EEMI calls are SMC64 SIP Fast Calls */ + if ( !(fid & ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, + ARM_SMCCC_CONV_64, + ARM_SMCCC_OWNER_SIP, + 0x0)) ) I am afraid this does not work as you expect. This only check that at least one bit is set, it does not check the bits have the correct value.
But this is merely a hack to avoid having everywhere:
ARM_SMCCC_CALL_VAL(..., ..., ..., 0x0)
This is mostly due to how you define the IDs. I can see two solutions
1) Stop using the enum and define use IDs using ARM_SMCCC_CALL_VAL(...)
2) Introduce EEMI_FID to wrap the call and use everywhere
1) is probably the best but I am happy with 2) as well. This also has the
advantage to avoid handling SMCCC32 functions aside and match how the other SMCC
subsystem are implemented in Xen (see vpsci and vsmc).
On the previous version, I have requested a comment in the code explaining why forward the commands without sanity check. + arm_smccc_1_1_smc(get_user_reg(regs, 0), + get_user_reg(regs, 1), + get_user_reg(regs, 2), + get_user_reg(regs, 3), + get_user_reg(regs, 4), + get_user_reg(regs, 5), + get_user_reg(regs, 6), + get_user_reg(regs, 7), + &res); + + set_user_reg(regs, 0, res.a0); + set_user_reg(regs, 1, res.a1); + set_user_reg(regs, 2, res.a2); + set_user_reg(regs, 3, res.a3); + return true; + +done: + set_user_reg(regs, 0, ret); + return true; }/* Cheers, -- Julien Grall _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxxx https://lists.xenproject.org/mailman/listinfo/xen-devel
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