[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Xen-devel] [PATCH v3 01/34] x86emul: support AVX512 opmask insns



>>> On 25.10.18 at 20:32, <andrew.cooper3@xxxxxxxxxx> wrote:
> On 18/09/18 12:53, Jan Beulich wrote:
>> @@ -1187,6 +1188,11 @@ static int _get_fpu(
>>              return X86EMUL_UNHANDLEABLE;
>>          break;
>>  
>> +    case X86EMUL_FPU_opmask:
>> +        if ( !(xcr0 & X86_XCR0_SSE) || !(xcr0 & X86_XCR0_OPMASK) )
>> +            return X86EMUL_UNHANDLEABLE;
>> +        break;
> 
> I see this follows the pattern from X86EMUL_FPU_ymm, but by the SSE
> check?  It is not relevant at this point - if xcr0.opmask is set, the
> opmask instructions should be usable.

I would agree with you from a functional POV, but please see the
last row of the table named "OS XSAVE Enabling Requirements of
Instruction Categories" in SDM Vol 2.

Jan



_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxxxxxxxxx
https://lists.xenproject.org/mailman/listinfo/xen-devel

 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.