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Re: [Xen-devel] [PATCH v2] x86/boot: enable NMIs after traps init


  • To: Ross Philipson <ross.philipson@xxxxxxxxx>, Jason Andryuk <jandryuk@xxxxxxxxx>
  • From: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
  • Date: Tue, 23 Oct 2018 17:58:56 +0100
  • Autocrypt: addr=andrew.cooper3@xxxxxxxxxx; prefer-encrypt=mutual; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA==
  • Cc: sergey.dyasli@xxxxxxxxxx, Wei Liu <wei.liu2@xxxxxxxxxx>, eric chanudet <eric.chanudet@xxxxxxxxx>, Jan Beulich <jbeulich@xxxxxxxx>, xen-devel@xxxxxxxxxxxxx
  • Delivery-date: Tue, 23 Oct 2018 16:59:09 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
  • Openpgp: preference=signencrypt

On 23/10/18 17:42, Ross Philipson wrote:
>
> On 10/23/2018 11:31 AM, Jason Andryuk wrote:
>> On Tue, Oct 23, 2018 at 10:46 AM Andrew Cooper
>> <andrew.cooper3@xxxxxxxxxx> wrote:
>>> On 23/10/18 15:01, Jason Andryuk wrote:
>>>> On Tue, Oct 23, 2018 at 7:15 AM Andrew Cooper <andrew.cooper3@xxxxxxxxxx> 
>>>> wrote:
>>>>> On 23/10/18 11:59, Sergey Dyasli wrote:
>>>>>> In certain scenarios, NMIs might be disabled during Xen boot process.
>>>>>> Such situation will cause alternative_instructions() to:
>>>>>>
>>>>>>     panic("Timed out waiting for alternatives self-NMI to hit");
>>>>>>
>>>>>> This bug was originally seen when using Tboot to boot Xen.
>>>>>>
>>>>>> To prevent this from happening, enable NMIs during cpu_init() and
>>>>>> during __start_xen() for BSP.
>>>>>>
>>>>>> Signed-off-by: Sergey Dyasli <sergey.dyasli@xxxxxxxxxx>
>>>>> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
>>>> FYI, Ross and Eric came up with a tboot patch recently added to OpenXT:
>>>> https://github.com/OpenXT/xenclient-oe/blob/master/recipes-openxt/tboot/tboot-1.9.6/0023-tboot-Unmask-NMI-potentially-masked-during-SENTER.patch
>>>>
>>>> Using this Xen patch with the tboot one reverted works too.
>>>>
>>>> Tested-by: Jason Andryuk <jandryuk@xxxxxxxxx>
>>> :(
>>>
>>> Can bugs like this please be reported upstream?  Given the observation
>>> of "Tboot hands off with NMIs disabled", the fix is very easy.
>> I'm not opposed to reporting upstream.  In this case, I at least
>> assumed it was something we did in our EFI & tboot combo.  An Ivy
>> Bridge legacy boot system with tboot & Xen worked fine.  For me, it
>> was only a newer Skylake (or Kaby Lake) machine that had issue when
>> booting our EFI & tboot combo.  So it wasn't clear that tboot always
>> left NMIs disabled.  Yes, we should have reported something upstream
>> as a heads up for other tboot/Xen users.
> According to the specs, NMIs and SMIs are disabled post launch on the BSP and
> after AP wakeup is done. The TBOOT code explicitly re-enables SMIs but 
> currently
> not NMIs. Any IRET later on would have re-enabled them so it might explain how
> they incidentally get re-enabled in certain configurations.
>
> Personally I think the fix to re-enable them in TBOOT should go upstream.

Which spec?  Can it be changed/improved?

I accept this might be what it currently says, but enabling NMIs before
the OS is capable of handling them is only going to cause sad users on
anything but a completely idle system.

x86 is a gnarley architecture when it comes to this level of detail.  It
is not possible for a kernel to be a mode transition (real => protected,
or into long mode) and handle interrupts safely, because we can't
atomically set the mode and change the layout/position of the IDT.

We can at least avoid taking #MC when it is definitely unsafe to do so,
by not having CR4.MCE set.  An #MC at that point will be terminal to the
system, but you've got hardware problems at that point and all bets were
off anyway.  (Also, for those not keeping score on L1 Terminal Fault and
disabling hyperthreads threads, if any single one of your hyperthreads
has CR4.MCE clear, e.g. because your in the middle of booting it, an #MC
is fatal to the system.)

For NMI's the only way of guaranteeing that one doesn't arrive until the
IDT is set up properly is to leave the NMI shadow active until the OS
explicitly decided that it is safe.

While some might be viewed as a bug in tboot, I view it as a feature
which should be retained.  How late can late launches occur in practice?

~Andrew

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