[Xen-devel] [PATCH v4 00/44] x86emul: fixes, improvements, and beginnings of AVX512 support

["Jan Beulich" <JBeulich@xxxxxxxx>]

01: support AVX512 opmask insns
02: x86/HVM: grow MMIO cache data size to 64 bytes
03: correct EVEX decoding
04: generalize vector length handling for AVX512/EVEX
05: support basic AVX512 moves
06: test for correct EVEX Disp8 scaling
07: also allow running the 32-bit harness on a 64-bit distro
08: use AVX512 logic for emulating V{,P}MASKMOV*
09: support AVX512F legacy-equivalent arithmetic FP insns
10: support AVX512DQ logic FP insns
11: support AVX512F "normal" FP compare insns
12: support AVX512F misc legacy-equivalent FP insns
13: support AVX512F fused-multiply-add insns
14: support AVX512F legacy-equivalent logic insns
15: support AVX512{F,DQ} FP broadcast insns
16: support AVX512F v{,u}comis{d,s} insns
17: test: introduce eq()
18: support AVX512{F,BW} packed integer compare insns
19: support AVX512{F,BW} packed integer arithmetic insns
20: use simd_128 also for legacy vector shift insns
21: support AVX512{F,BW} shift/rotate insns
22: support AVX512{F,BW,DQ} extract insns
23: support AVX512{F,BW,DQ} insert insns
24: basic AVX512F testing
25: support AVX512{F,BW,DQ} integer broadcast insns
26: basic AVX512VL testing
27: support AVX512{F,BW} zero- and sign-extending moves
28: support AVX512{F,BW} down conversion moves
29: support AVX512{F,BW} integer unpack insns
30: support AVX512{F,BW,_VBMI} full permute insns
31: support AVX512{F,BW} integer shuffle insns
32: support AVX512{BW,DQ} mask move insns
33: basic AVX512BW testing
34: basic AVX512DQ testing
35: support AVX512F move high/low insns
36: support AVX512F move duplicate insns
37: support AVX512{F,BW,VBMI} permute insns
38: support AVX512BW pack insns
39: support AVX512F floating-point conversion insns
40: support AVX512F legacy-equivalent packed int/FP conversion insns
41: support AVX512F legacy-equivalent scalar int/FP conversion insns
42: support AVX512DQ packed quad-int/FP conversion insns
43: support AVX512{F,DQ} uint-to-FP conversion insns
44: support AVX512{F,DQ} FP-to-uint conversion insns

The main goal of this series is to support enough of the instructions
such that basic AVX512F, AVX512BW, AVX512DQ, and AVX512VL
tests can be run (this set is relevant as a basis in particular due to
it together mostly [entirely?] covering the legacy-equivalent AVX512
insns). Later additions then (will) simply enable further of the
(conditional) tests in simd*.c (or by other means).

Besides the additions to the series there are two main changes to
previously posted patches: While implementing support for convert
instructions I've noticed an issue with insns being WIG outside of
64-bit mode, but EVEX.W being meaningful in 64-bit mode (movd,
pextrd, pinsrd, and the scalar convert insns). Furthermore I now
hope that the test harness will also run on AVX512VL-incapable
hardware (albeit I'm not myself able to test this, so I can't exclude
there are still issues left). For details, including further smaller
adjustments, please see the individual patches.

Jan



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