[Xen-devel] [PATCH 05/13] libx86: Introduce libx86/msr.h and share msr_{domain, vcpu}_policy with userspace

[Andrew Cooper <andrew.cooper3@xxxxxxxxxx>]

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
---
CC: Jan Beulich <JBeulich@xxxxxxxx>
CC: Wei Liu <wei.liu2@xxxxxxxxxx>
CC: Roger Pau Monné <roger.pau@xxxxxxxxxx>
CC: Sergey Dyasli <sergey.dyasli@xxxxxxxxxx>
CC: Ian Jackson <Ian.Jackson@xxxxxxxxxxxxx>
---
 tools/libxc/xc_cpuid_x86.c   |  1 +
 xen/include/asm-x86/msr.h    | 51 +++-----------------------------------
 xen/include/xen/libx86/msr.h | 58 ++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 62 insertions(+), 48 deletions(-)
 create mode 100644 xen/include/xen/libx86/msr.h

diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c
index 8c7a951..900c639 100644
--- a/tools/libxc/xc_cpuid_x86.c
+++ b/tools/libxc/xc_cpuid_x86.c
@@ -30,6 +30,7 @@
 #define MAX(x, y) ((x) > (y) ? (x) : (y))
 
 #include <xen/libx86/cpuid.h>
+#include <xen/libx86/msr.h>
 
 enum {
 #define XEN_CPUFEATURE(name, value) X86_FEATURE_##name = value,
diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h
index d4064f4..d8cb638 100644
--- a/xen/include/asm-x86/msr.h
+++ b/xen/include/asm-x86/msr.h
@@ -8,6 +8,9 @@
 #include <xen/types.h>
 #include <xen/percpu.h>
 #include <xen/errno.h>
+
+#include <xen/libx86/msr.h>
+
 #include <asm/asm_defns.h>
 #include <asm/cpufeature.h>
 
@@ -257,26 +260,6 @@ static inline void wrmsr_tsc_aux(uint32_t val)
     }
 }
 
-/* MSR policy object for shared per-domain MSRs */
-struct msr_domain_policy
-{
-    /*
-     * 0x000000ce - MSR_INTEL_PLATFORM_INFO
-     *
-     * This MSR is non-architectural, but for simplicy we allow it to be read
-     * unconditionally.  CPUID Faulting support can be fully emulated for HVM
-     * guests so can be offered unconditionally, while support for PV guests
-     * is dependent on real hardware support.
-     */
-    union {
-        uint32_t raw;
-        struct {
-            uint32_t :31;
-            bool cpuid_faulting:1;
-        };
-    } plaform_info;
-};
-
 /* RAW msr domain policy: contains the actual values from H/W MSRs */
 extern struct msr_domain_policy raw_msr_domain_policy;
 /*
@@ -285,34 +268,6 @@ extern struct msr_domain_policy raw_msr_domain_policy;
  */
 extern struct msr_domain_policy host_msr_domain_policy;
 
-/* MSR policy object for per-vCPU MSRs */
-struct msr_vcpu_policy
-{
-    /* 0x00000048 - MSR_SPEC_CTRL */
-    struct {
-        /*
-         * Only the bottom two bits are defined, so no need to waste space
-         * with uint64_t at the moment, but use uint32_t for the convenience
-         * of the assembly code.
-         */
-        uint32_t raw;
-    } spec_ctrl;
-
-    /*
-     * 0x00000140 - MSR_INTEL_MISC_FEATURES_ENABLES
-     *
-     * This MSR is non-architectural, but for simplicy we allow it to be read
-     * unconditionally.  The CPUID Faulting bit is the only writeable bit, and
-     * only if enumerated by MSR_PLATFORM_INFO.
-     */
-    union {
-        uint32_t raw;
-        struct {
-            bool cpuid_faulting:1;
-        };
-    } misc_features_enables;
-};
-
 void init_guest_msr_policy(void);
 int init_domain_msr_policy(struct domain *d);
 int init_vcpu_msr_policy(struct vcpu *v);
diff --git a/xen/include/xen/libx86/msr.h b/xen/include/xen/libx86/msr.h
new file mode 100644
index 0000000..6b8b10b
--- /dev/null
+++ b/xen/include/xen/libx86/msr.h
@@ -0,0 +1,58 @@
+/* Common data structures and functions consumed by hypervisor and toolstack */
+#ifndef XEN_LIBX86_MSR_H
+#define XEN_LIBX86_MSR_H
+
+/* MSR policy object for shared per-domain MSRs */
+struct msr_domain_policy
+{
+    /*
+     * 0x000000ce - MSR_INTEL_PLATFORM_INFO
+     *
+     * This MSR is non-architectural, but for simplicy we allow it to be read
+     * unconditionally.  CPUID Faulting support can be fully emulated for HVM
+     * guests so can be offered unconditionally, while support for PV guests
+     * is dependent on real hardware support.
+     */
+    union {
+        uint32_t raw;
+        struct {
+            uint32_t :31;
+            bool cpuid_faulting:1;
+        };
+    } plaform_info;
+};
+
+/* MSR policy object for per-vCPU MSRs */
+struct msr_vcpu_policy
+{
+    /* 0x00000048 - MSR_SPEC_CTRL */
+    struct {
+        uint32_t raw;
+    } spec_ctrl;
+
+    /*
+     * 0x00000140 - MSR_INTEL_MISC_FEATURES_ENABLES
+     *
+     * This MSR is non-architectural, but for simplicy we allow it to be read
+     * unconditionally.  The CPUID Faulting bit is the only writeable bit, and
+     * only if enumerated by MSR_PLATFORM_INFO.
+     */
+    union {
+        uint32_t raw;
+        struct {
+            bool cpuid_faulting:1;
+        };
+    } misc_features_enables;
+};
+
+#endif /* !XEN_LIBX86_MSR_H */
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * tab-width: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
-- 
2.1.4


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