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Re: [Xen-devel] [PATCH 3/6] x86/msr: Clean up the MSR_{PLATFORM_INFO, MISC_FEATURES_ENABLES} constants

To: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
From: Roger Pau Monné <roger.pau@xxxxxxxxxx>
Date: Wed, 27 Jun 2018 13:08:48 +0200
Cc: Wei Liu <wei.liu2@xxxxxxxxxx>, Jan Beulich <JBeulich@xxxxxxxx>, Xen-devel <xen-devel@xxxxxxxxxxxxx>
Delivery-date: Wed, 27 Jun 2018 11:09:04 +0000
List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

On Tue, Jun 26, 2018 at 02:18:15PM +0100, Andrew Cooper wrote:
> These MSRs, while being Intel specific, are used to offer virtualised
> CPUID faulting support on AMD hardware, so remove the INTEL infix.
> 
> The bit position constants are used by guest_rdmsr(), but the logic can
> be expressed using MASK_INSR() which allows the removal of the bit
> position constants.
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>

Reviewed-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>

Roger.

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References:
- [Xen-devel] [PATCH 0/6] x86/msr: Introductory MSR cleanup
  - From: Andrew Cooper
- [Xen-devel] [PATCH 3/6] x86/msr: Clean up the MSR_{PLATFORM_INFO, MISC_FEATURES_ENABLES} constants
  - From: Andrew Cooper

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