Re: [Xen-devel] [PATCH v5 01/10] xen/arm64: Added handling of the trapped access to OSLSR register

[Julien Grall <julien.grall@xxxxxxx>]

Hi Mirela,

On 01/06/18 14:17, Mirela Simonovic wrote:
> Linux/dom0 accesses OSLSR register when saving CPU context during the
> suspend procedure. Xen traps access to this register, but has no handling
> for it. Consequently, Xen injects undef exception to linux, causing it to
> crash. This patch adds handling of the trapped access to OSLSR as read
> only as a fixed value.
Can you please mention that you introduced handle_ro_read_val() and 
rework handle_ro_raz()?
> Signed-off-by: Mirela Simonovic <mirela.simonovic@xxxxxxxxxx>
> Reviewed-by: Stefano Stabellini <sstabellini@xxxxxxxxxx>
> Acked-by: Julien Grall <julien.grall@xxxxxxx>
The reviewed-by/acked-by tags should only be kept when there are minor 
changes in the code (and the reviewer is happy with them). This is very 
important for the former as the tag means the reviewer read your code 
and confirm this is correct.
As you change quite a bit the patch, those 2 tags should have been removed.

Stefano, are you still happy with the Reviewed-by?

> ---
> CC: Stefano Stabellini <sstabellini@xxxxxxxxxx>
> CC: Julien Grall <julien.grall@xxxxxxx>
> ---
> Changes in v2:
> - Commit message fix (arm64 related change instead of arm)
> - Add Stefano's reviewed-by
>
> Changes in v3:
> - Added Julien's acked-by
>
> Changes in v5:
> -Insted of zero the reading of OSLSR_EL1 should return set bit 3
> -Implement new helper handle_ro_read_val() to support read only as a value.
>   handle_ro_read_val() reuses the implementation of handle_ro_raz() and
>   extends it with additional argument for passing the value to be returned
> -Use handle_ro_read_val() for handle_ro_raz() implementation to avoid code
>   duplication
> -Fix commit message to reflect changes made in this version
> ---
>   xen/arch/arm/arm64/vsysreg.c |  4 +++-
>   xen/arch/arm/traps.c         | 26 ++++++++++++++++++--------
>   xen/include/asm-arm/traps.h  |  4 ++++
>   3 files changed, 25 insertions(+), 9 deletions(-)
>
> diff --git a/xen/arch/arm/arm64/vsysreg.c b/xen/arch/arm/arm64/vsysreg.c
> index c57ac12503..6e60824572 100644
> --- a/xen/arch/arm/arm64/vsysreg.c
> +++ b/xen/arch/arm/arm64/vsysreg.c
> @@ -57,13 +57,15 @@ void do_sysreg(struct cpu_user_regs *regs,
>        * ARMv8 (DDI 0487A.d): D1-1509 Table D1-58
>        *
>        * Unhandled:
> -     *    OSLSR_EL1
>        *    DBGPRCR_EL1
>        */
>       case HSR_SYSREG_OSLAR_EL1:
>           return handle_wo_wi(regs, regidx, hsr.sysreg.read, hsr, 1);
>       case HSR_SYSREG_OSDLR_EL1:
>           return handle_raz_wi(regs, regidx, hsr.sysreg.read, hsr, 1);
> +    case HSR_SYSREG_OSLSR_EL1:
> +        return handle_ro_read_val(regs, regidx, hsr.sysreg.read, hsr, 1,
> +                                  1 << 3);
>   
>       /*
>        * MDCR_EL2.TDA
> diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
> index 5c18e918b0..d71adfa745 100644
> --- a/xen/arch/arm/traps.c
> +++ b/xen/arch/arm/traps.c
> @@ -1739,12 +1739,13 @@ void handle_wo_wi(struct cpu_user_regs *regs,
>       advance_pc(regs, hsr);
>   }
>   
> -/* Read only as read as zero */
> -void handle_ro_raz(struct cpu_user_regs *regs,
> -                   int regidx,
> -                   bool read,
> -                   const union hsr hsr,
> -                   int min_el)
> +/* Read only as value provided with 'val' argument of this function */
> +void handle_ro_read_val(struct cpu_user_regs *regs,
> +                        int regidx,
> +                        bool read,
> +                        const union hsr hsr,
> +                        int min_el,
> +                        register_t val)
>   {
>       ASSERT((min_el == 0) || (min_el == 1));
>   
> @@ -1753,13 +1754,22 @@ void handle_ro_raz(struct cpu_user_regs *regs,
>   
>       if ( !read )
>           return inject_undef_exception(regs, hsr);
> -    /* else: raz */
>   
> -    set_user_reg(regs, regidx, 0);
> +    set_user_reg(regs, regidx, val);
>   
>       advance_pc(regs, hsr);
>   }
>   
> +/* Read only as read as zero */
> +inline void handle_ro_raz(struct cpu_user_regs *regs,
> +                          int regidx,
> +                          bool read,
> +                          const union hsr hsr,
> +                          int min_el)
> +{
> +    handle_ro_read_val(regs, regidx, read, hsr, min_el, 0);
> +}
> +
>   void dump_guest_s1_walk(struct domain *d, vaddr_t addr)
>   {
>       register_t ttbcr = READ_SYSREG(TCR_EL1);
> diff --git a/xen/include/asm-arm/traps.h b/xen/include/asm-arm/traps.h
> index a0e5e92ebb..70b52d1d16 100644
> --- a/xen/include/asm-arm/traps.h
> +++ b/xen/include/asm-arm/traps.h
> @@ -27,6 +27,10 @@ void handle_wo_wi(struct cpu_user_regs *regs, int regidx, 
> bool read,
>   void handle_ro_raz(struct cpu_user_regs *regs, int regidx, bool read,
>                      const union hsr hsr, int min_el);
>   
> +/* Read only as value provided with 'val' argument */
> +void handle_ro_read_val(struct cpu_user_regs *regs, int regidx, bool read,
> +                        const union hsr hsr, int min_el, register_t val);
> +
>   /* Co-processor registers emulation (see arch/arm/vcpreg.c). */
>   void do_cp15_32(struct cpu_user_regs *regs, const union hsr hsr);
>   void do_cp15_64(struct cpu_user_regs *regs, const union hsr hsr);
--
Julien Grall

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