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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH RESEND v1 2/7] x86: configure vmcs for Intel processor trace virtualization
>>> On 15.01.18 at 19:12, <luwei.kang@xxxxxxxxx> wrote:
> This patch configure VMCS to make Intel PT output address can be
> treat as guest physical address and translated by EPT when
> intel_pt option is true.
> There have some constraint condition on VMCS configuration,
> otherwise will cause VM entry failed.
>
> 1. If the “Guest PT uses Guest Physical Addresses” execution
> control is 1, the “Clear IA32_RTIT_CTL on exit” exit
> control and the “Load IA32_RTIT_CTL on entry” entry
> control must also be 1.
> 2. If the “Guest PT uses Guest Physical Addresses” execution
> control is 1, the "enable EPT" execution control must
> also be 1.
What are the implications for a guest running with hap=0?
> @@ -383,13 +388,28 @@ static int vmx_init_vmcs_config(void)
> _vmx_secondary_exec_control &=
> ~SECONDARY_EXEC_ENABLE_VIRT_EXCEPTIONS;
>
> min = 0;
> - opt = VM_ENTRY_LOAD_GUEST_PAT | VM_ENTRY_LOAD_BNDCFGS;
> + opt = VM_ENTRY_LOAD_GUEST_PAT | VM_ENTRY_LOAD_BNDCFGS |
> + VM_ENTRY_CONCEAL_PT_PIP | VM_ENTRY_LOAD_IA32_RTIT_CTL;
> _vmx_vmentry_control = adjust_vmx_controls(
> "VMEntry Control", min, opt, MSR_IA32_VMX_ENTRY_CTLS, &mismatch);
>
> if ( mismatch )
> return -EINVAL;
>
> + if ( !(_vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_EPT) ||
> + !(_vmx_secondary_exec_control & SECONDARY_EXEC_PT_USE_GPA) ||
> + !(_vmx_vmexit_control & VM_EXIT_CLEAR_IA32_RTIT_CTL) ||
> + !(_vmx_vmentry_control & VM_ENTRY_LOAD_IA32_RTIT_CTL) )
> + {
> + _vmx_secondary_exec_control &= ~(SECONDARY_EXEC_PT_USE_GPA |
> + SECONDARY_EXEC_CONCEAL_PT_PIP);
> + _vmx_vmexit_control &= ~(VM_EXIT_CONCEAL_PT_PIP |
> + VM_EXIT_CLEAR_IA32_RTIT_CTL);
> + _vmx_vmentry_control &= ~(VM_ENTRY_CONCEAL_PT_PIP |
> + VM_ENTRY_LOAD_IA32_RTIT_CTL);
> + opt_intel_pt = 0;
> + }
Besides clearing the flag here, shouldn't you also check it further up?
Jan
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