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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v2 02/10] xen/arm: Ignore write to GICD_ISACTIVERn registers (vgic-v2)
Hi Mirela, On 04/24/2018 12:02 PM, Mirela Simonovic wrote: Hi Julien, On Mon, Apr 23, 2018 at 1:15 PM, Julien Grall <julien.grall@xxxxxxx> wrote:Hi Mirela, On 20/04/18 13:25, Mirela Simonovic wrote: Either that or: if ( r == 0 ) goto write_ignore_32;So you don't need to rework the code too much. Both would probably want some comment in the code. Please note that in the original patch where I ignored the write regardless of the value I just followed how it is already done for GICD_ICACTIVER. For existing GICD_ICACTIVER case there is no check for the value to be written and there is a warning printed. Not checking the value seems fine to me but why is then a warning printed? Should we suppress that print as well? The way it is done in ICACTIVER is really fragile. The guest may think the active bit of the interrupt was cleared but this is not the case. It is not easy to check if the active bit is set in the current vGIC (should be better in the new vGIC). So it was decided to just ignore it to make Linux happy. The warning is here to tell the user that some may not work as expected. Regarding the ISACTIVER, you know that if the user write 0 none of the active state of the interrupts will be changed. So it is fine to avoid printing the warning. However, if there are one bit set then you really want to warn the user as the hypervisor will not probably handle it. So we want to keep the warning in both case. Cheers, -- Julien Grall _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxxx https://lists.xenproject.org/mailman/listinfo/xen-devel
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