Re: [Xen-devel] [PATCH 2/7] xen/arm/vgic-v2: Ignore write to GICD_ISACTIVERn registers

[Julien Grall <julien.grall@xxxxxxx>]

Hi,

On 11/04/18 14:19, Mirela Simonovic wrote:
> Guests attempt to write into these registers on resume (for example Linux).
> Without this patch a data abort exception will be raised to the guest.
> This patch handles the write access by ignoring it. This should be fine for
> now because reading these registers is already handled as 'read as zero'.
I think this patch is wrong. It is not mandatory for the guest to write 
exactly the same value as read. Assuming the guest will always write 0, 
then what you want to do is checking the write is actually 0. In that 
case you can ignore it. For all the other case, you should still fail.
Cheers,

> Signed-off-by: Mirela Simonovic <mirela.simonovic@xxxxxxxxxx>
> ---
>   xen/arch/arm/vgic-v2.c | 3 +--
>   1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/xen/arch/arm/vgic-v2.c b/xen/arch/arm/vgic-v2.c
> index 646d1f3d12..b088376ed0 100644
> --- a/xen/arch/arm/vgic-v2.c
> +++ b/xen/arch/arm/vgic-v2.c
> @@ -484,11 +484,10 @@ static int vgic_v2_distr_mmio_write(struct vcpu *v, 
> mmio_info_t *info,
>           return 0;
>   
>       case VRANGE32(GICD_ISACTIVER, GICD_ISACTIVERN):
> -        if ( dabt.size != DABT_WORD ) goto bad_width;
>           printk(XENLOG_G_ERR
>                  "%pv: vGICD: unhandled word write %#"PRIregister" to 
> ISACTIVER%d\n",
>                  v, r, gicd_reg - GICD_ISACTIVER);
> -        return 0;
> +        goto write_ignore_32;
>   
>       case VRANGE32(GICD_ICACTIVER, GICD_ICACTIVERN):
>           printk(XENLOG_G_ERR
--
Julien Grall

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