Re: [Xen-devel] [PATCH v3 36/39] ARM: new VGIC: vgic-init: implement vgic_init

[Stefano Stabellini <sstabellini@xxxxxxxxxx>]

On Tue, 27 Mar 2018, Stefano Stabellini wrote:
> > +static void vgic_vcpu_early_init(struct vcpu *vcpu)
> > +{
> > +    struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic;
> > +    unsigned int i;
> > +
> > +    INIT_LIST_HEAD(&vgic_cpu->ap_list_head);
> > +    spin_lock_init(&vgic_cpu->ap_list_lock);
> > +
> > +    /*
> > +     * Enable and configure all SGIs to be edge-triggered and
> > +     * configure all PPIs as level-triggered.
> > +     */
> > +    for ( i = 0; i < VGIC_NR_PRIVATE_IRQS; i++ )
> > +    {
> > +        struct vgic_irq *irq = &vgic_cpu->private_irqs[i];
> > +
> > +        INIT_LIST_HEAD(&irq->ap_list);
> > +        spin_lock_init(&irq->irq_lock);
> > +        irq->intid = i;
> > +        irq->vcpu = NULL;
> > +        irq->target_vcpu = vcpu;
> > +        irq->targets = 1U << vcpu->vcpu_id;
> > +        atomic_set(&irq->refcount, 0);
> > +        if ( vgic_irq_is_sgi(i) )
> > +        {
> > +            /* SGIs */
> > +            irq->enabled = 1;
> > +            irq->config = VGIC_CONFIG_EDGE;
> > +        }
> > +        else
> > +        {
> > +            /* PPIs */
> > +            irq->config = VGIC_CONFIG_LEVEL;

Please see my comment about evtchn_irq being edge:

alpine.DEB.2.10.1803271651150.12360@sstabellini-ThinkPad-X260


> > +        }
> > +    }
> > +}


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