Re: [Xen-devel] [PATCH 14/57] ARM: VGIC: Introduce gic_get_nr_lrs()

[Julien Grall <julien.grall@xxxxxxx>]

Hi Andre,

On 05/03/18 16:03, Andre Przywara wrote:
> So far the number of list registers (LRs) a GIC implements is only
> needed in the hardware facing side of the VGIC code (gic-vgic.c).
> The new VGIC will need this information in more and multiple places, so
> export a function that returns the number.
>
> Signed-off-by: Andre Przywara <andre.przywara@xxxxxxxxxx>
Reviewed-by: Julien Grall <julien.grall@xxxxxxx>

Cheers,

> ---
> Changelog RFC ... v1:
> - move gic_get_nr_lrs() into gic.h (as a static inline)
>
>   xen/arch/arm/gic-vgic.c   | 10 +++++-----
>   xen/include/asm-arm/gic.h |  6 ++++++
>   2 files changed, 11 insertions(+), 5 deletions(-)
>
> diff --git a/xen/arch/arm/gic-vgic.c b/xen/arch/arm/gic-vgic.c
> index 60c6c463e9..93e42739d9 100644
> --- a/xen/arch/arm/gic-vgic.c
> +++ b/xen/arch/arm/gic-vgic.c
> @@ -25,7 +25,7 @@
>   #include <asm/gic.h>
>   #include <asm/vgic.h>
>   
> -#define lr_all_full() (this_cpu(lr_mask) == ((1 << gic_hw_ops->info->nr_lrs) - 1))
> +#define lr_all_full() (this_cpu(lr_mask) == ((1 << gic_get_nr_lrs()) - 1))
>   
>   #undef GIC_DEBUG
>   
> @@ -110,7 +110,7 @@ static unsigned int gic_find_unused_lr(struct vcpu *v,
>                                          struct pending_irq *p,
>                                          unsigned int lr)
>   {
> -    unsigned int nr_lrs = gic_hw_ops->info->nr_lrs;
> +    unsigned int nr_lrs = gic_get_nr_lrs();
>       unsigned long *lr_mask = (unsigned long *) &this_cpu(lr_mask);
>       struct gic_lr lr_val;
>   
> @@ -137,7 +137,7 @@ void gic_raise_guest_irq(struct vcpu *v, unsigned int virtual_irq,
>           unsigned int priority)
>   {
>       int i;
> -    unsigned int nr_lrs = gic_hw_ops->info->nr_lrs;
> +    unsigned int nr_lrs = gic_get_nr_lrs();
>       struct pending_irq *p = irq_to_pending(v, virtual_irq);
>   
>       ASSERT(spin_is_locked(&v->arch.vgic.lock));
> @@ -251,7 +251,7 @@ void vgic_sync_from_lrs(struct vcpu *v)
>   {
>       int i = 0;
>       unsigned long flags;
> -    unsigned int nr_lrs = gic_hw_ops->info->nr_lrs;
> +    unsigned int nr_lrs = gic_get_nr_lrs();
>   
>       /* The idle domain has no LRs to be cleared. Since gic_restore_state
>        * doesn't write any LR registers for the idle domain they could be
> @@ -278,7 +278,7 @@ static void gic_restore_pending_irqs(struct vcpu *v)
>       struct pending_irq *p, *t, *p_r;
>       struct list_head *inflight_r;
>       unsigned long flags;
> -    unsigned int nr_lrs = gic_hw_ops->info->nr_lrs;
> +    unsigned int nr_lrs = gic_get_nr_lrs();
>       int lrs = nr_lrs;
>   
>       spin_lock_irqsave(&v->arch.vgic.lock, flags);
> diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h
> index a23c307c3a..b3f840ea9a 100644
> --- a/xen/include/asm-arm/gic.h
> +++ b/xen/include/asm-arm/gic.h
> @@ -374,6 +374,12 @@ struct gic_hw_operations {
>   };
>   
>   extern const struct gic_hw_operations *gic_hw_ops;
> +
> +static inline unsigned int gic_get_nr_lrs(void)
> +{
> +    return gic_hw_ops->info->nr_lrs;
> +}
> +
>   void register_gic_ops(const struct gic_hw_operations *ops);
>   int gic_make_hwdom_dt_node(const struct domain *d,
>                              const struct dt_device_node *gic,
--
Julien Grall

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