Re: [Xen-devel] [PATCH v2 2/6] x86/xpti: don't flush TLB twice when switching to 64-bit pv context

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 02.03.18 at 09:13, <jgross@xxxxxxxx> wrote:
> @@ -509,9 +510,16 @@ void make_cr3(struct vcpu *v, mfn_t mfn)
>  
>  void write_ptbase(struct vcpu *v)
>  {
> -    get_cpu_info()->root_pgt_changed = this_cpu(root_pgt) && is_pv_vcpu(v) &&
> -                                       !is_pv_32bit_vcpu(v);
> -    write_cr3(v->arch.cr3);
> +    if ( this_cpu(root_pgt) && is_pv_vcpu(v) && !is_pv_32bit_vcpu(v) )
> +    {
> +        get_cpu_info()->root_pgt_changed = true;
> +        asm volatile ( "mov %0, %%cr3" : : "r" (v->arch.cr3) : "memory" );
> +    }
> +    else
> +    {
> +        get_cpu_info()->root_pgt_changed = false;

Is this write really necessary?

Jan


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