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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v2] x86: invpcid support
On Fri, Mar 02, 2018 at 09:47:45AM -0700, Jan Beulich wrote:
> >>> On 02.03.18 at 17:23, <wei.liu2@xxxxxxxxxx> wrote:
> > +static inline void invpcid(unsigned int pcid, unsigned long addr,
> > + unsigned int type)
> > +{
> > + struct {
> > + uint64_t pcid:12;
> > + uint64_t reserved:52;
> > + uint64_t addr;
> > + } desc = { .pcid = pcid, .addr = addr };
> > +
> > + asm volatile (
> > +#ifdef HAVE_AS_INVPCID
> > + "invpcid %[desc], %q[type]"
> > + : /* No output */
> > + : [desc] "m" (desc), [type] "r" (type)
> > +#else
> > + INVPCID_OPCODE MODRM_ECX_01
> > + : /* No output */
> > + : "a" (type), "c" (&desc)
> > +#endif
> > + : "memory" );
>
> I can see why you need the memory clobber in the #else case
> (albeit even there it could be avoided by also properly specifying
> the input), but what is this good for in the #if case?
It is the same as why writing to CR3 requires a memory clobber. It is
flushing TLB.
Wei.
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