Re: [Xen-devel] [PATCH v4 3/4] x86emul: Support vaes insns

[Yang Zhong <yang.zhong@xxxxxxxxx>]

On Thu, Jan 18, 2018 at 07:13:21AM -0700, Jan Beulich wrote:
> >>> On 03.01.18 at 09:26, <yang.zhong@xxxxxxxxx> wrote:
> > The previous aes insns only support legacy and AVX128.
> > Icelake added AVX256 support.
> 
> Same remark here as for the pclmulqdq patch.
> 
> > Signed-off-by: Yang Zhong <yang.zhong@xxxxxxxxx>
> > ---
> 
> Please provide a brief list of changes at this spot in each patch.
> 
> > @@ -7336,17 +7337,23 @@ x86_emulate(
> >      case X86EMUL_OPC_66(0x0f38, 0xdb):     /* aesimc xmm/m128,xmm */
> >      case X86EMUL_OPC_VEX_66(0x0f38, 0xdb): /* vaesimc xmm/m128,xmm */
> >      case X86EMUL_OPC_66(0x0f38, 0xdc):     /* aesenc xmm/m128,xmm,xmm */
> > -    case X86EMUL_OPC_VEX_66(0x0f38, 0xdc): /* vaesenc xmm/m128,xmm,xmm */
> > +    case X86EMUL_OPC_VEX_66(0x0f38, 0xdc): /* vaesenc 
> > {x,y}mm/mem,{x,y}mm,{x,y}mm */
> >      case X86EMUL_OPC_66(0x0f38, 0xdd):     /* aesenclast xmm/m128,xmm,xmm 
> > */
> > -    case X86EMUL_OPC_VEX_66(0x0f38, 0xdd): /* vaesenclast xmm/m128,xmm,xmm 
> > */
> > +    case X86EMUL_OPC_VEX_66(0x0f38, 0xdd): /* vaesenclast 
> > {x,y}mm/mem,{x,y}mm,{x,y}mm */
> >      case X86EMUL_OPC_66(0x0f38, 0xde):     /* aesdec xmm/m128,xmm,xmm */
> > -    case X86EMUL_OPC_VEX_66(0x0f38, 0xde): /* vaesdec xmm/m128,xmm,xmm */
> > +    case X86EMUL_OPC_VEX_66(0x0f38, 0xde): /* vaesdec 
> > {x,y}mm/mem,{x,y}mm,{x,y}mm */
> >      case X86EMUL_OPC_66(0x0f38, 0xdf):     /* aesdeclast xmm/m128,xmm,xmm 
> > */
> > -    case X86EMUL_OPC_VEX_66(0x0f38, 0xdf): /* vaesdeclast xmm/m128,xmm,xmm 
> > */
> > +    case X86EMUL_OPC_VEX_66(0x0f38, 0xdf): /* vaesdeclast 
> > {x,y}mm/mem,{x,y}mm,{x,y}mm */
> > +        if ( vex.l )
> > +        {
> > +            host_and_vcpu_must_have(vaes);
> > +            goto simd_0f_ymm;
> > +        }
> >          host_and_vcpu_must_have(aesni);
> >          if ( vex.opcx == vex_none )
> >              goto simd_0f38_common;
> > -        /* fall through */
> > +        goto simd_0f_avx;
> > +
> >      case X86EMUL_OPC_VEX_66(0x0f38, 0x41): /* vphminposuw xmm/m128,xmm,xmm 
> > */
> 
> Hmm, you've reacted to my v3 comments, but you didn't really address
> them: VAESIMC still is mishandled with the code above. Note that I didn't
> say "remove the fall-through", but instead "move out the block no longer
> wanting this fall-through".
> 
> Jan

Hello Jan,

I did below TEMP patch, please help me check whther this patch meet your 
requirements, many thanks!

I moved vaesimc insn before host_and_vcpu_must_have(aesni), this method
can make sure there is not any change for vaesimc. by the way, the fall
through still be kept for avx128.


+#define vcpu_has_vaes()        vcpu_has(         7, ECX,  9, ctxt, ops)
 #define vcpu_has_vpclmulqdq()  vcpu_has(         7, ECX, 10, ctxt, ops)
 #define vcpu_has_rdpid()       vcpu_has(         7, ECX, 22, ctxt, ops)
 #define vcpu_has_clzero()      vcpu_has(0x80000008, EBX,  0, ctxt, ops)
@@ -7334,15 +7335,20 @@ x86_emulate(
         goto simd_0f38_common;

     case X86EMUL_OPC_66(0x0f38, 0xdb):     /* aesimc xmm/m128,xmm */
-    case X86EMUL_OPC_VEX_66(0x0f38, 0xdb): /* vaesimc xmm/m128,xmm */
     case X86EMUL_OPC_66(0x0f38, 0xdc):     /* aesenc xmm/m128,xmm,xmm */
-    case X86EMUL_OPC_VEX_66(0x0f38, 0xdc): /* vaesenc xmm/m128,xmm,xmm */
+    case X86EMUL_OPC_VEX_66(0x0f38, 0xdc): /* vaesenc 
{x,y}mm/mem,{x,y}mm,{x,y}mm */
     case X86EMUL_OPC_66(0x0f38, 0xdd):     /* aesenclast xmm/m128,xmm,xmm */
-    case X86EMUL_OPC_VEX_66(0x0f38, 0xdd): /* vaesenclast xmm/m128,xmm,xmm */
+    case X86EMUL_OPC_VEX_66(0x0f38, 0xdd): /* vaesenclast 
{x,y}mm/mem,{x,y}mm,{x,y}mm */
     case X86EMUL_OPC_66(0x0f38, 0xde):     /* aesdec xmm/m128,xmm,xmm */
-    case X86EMUL_OPC_VEX_66(0x0f38, 0xde): /* vaesdec xmm/m128,xmm,xmm */
+    case X86EMUL_OPC_VEX_66(0x0f38, 0xde): /* vaesdec 
{x,y}mm/mem,{x,y}mm,{x,y}mm */
     case X86EMUL_OPC_66(0x0f38, 0xdf):     /* aesdeclast xmm/m128,xmm,xmm */
-    case X86EMUL_OPC_VEX_66(0x0f38, 0xdf): /* vaesdeclast xmm/m128,xmm,xmm */
+    case X86EMUL_OPC_VEX_66(0x0f38, 0xdf): /* vaesdeclast 
{x,y}mm/mem,{x,y}mm,{x,y}mm */
+        if ( vex.l )
+        {
+            host_and_vcpu_must_have(vaes);
+            goto simd_0f_ymm;
+        }
+    case X86EMUL_OPC_VEX_66(0x0f38, 0xdb): /* vaesimc xmm/m128,xmm */
         host_and_vcpu_must_have(aesni);
         if ( vex.opcx == vex_none )
             goto simd_0f38_common;


Regards,

Yang



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