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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH 1/2] x86: improve NOP use for AMD CPUs
For Fam10 and later AMD recommends using the "long" NOP forms. Re-write
the present Intel code into switch() statements and add AMD logic. This
at the same time brings us in line again with current Linux.
Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
--- a/xen/arch/x86/alternative.c
+++ b/xen/arch/x86/alternative.c
@@ -85,19 +85,34 @@ static int __init mask_nmi_callback(cons
static void __init arch_init_ideal_nops(void)
{
- /*
- * Due to a decoder implementation quirk, some
- * specific Intel CPUs actually perform better with
- * the "k8_nops" than with the SDM-recommended NOPs.
- */
- if ( (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) &&
- !(boot_cpu_data.x86 == 6 &&
- boot_cpu_data.x86_model >= 0x0f &&
- boot_cpu_data.x86_model != 0x1c &&
- boot_cpu_data.x86_model != 0x26 &&
- boot_cpu_data.x86_model != 0x27 &&
- boot_cpu_data.x86_model < 0x30) )
- ideal_nops = p6_nops;
+ switch ( boot_cpu_data.x86_vendor )
+ {
+ case X86_VENDOR_INTEL:
+ /*
+ * Due to a decoder implementation quirk, some specific Intel CPUs
+ * actually perform better with the "k8_nops" than with the SDM-
+ * recommended NOPs.
+ */
+ if ( boot_cpu_data.x86 != 6 )
+ ideal_nops = p6_nops;
+ else
+ switch ( boot_cpu_data.x86_model )
+ {
+ case 0x0f ... 0x1b:
+ case 0x1d ... 0x25:
+ case 0x28 ... 0x2f:
+ break;
+ default:
+ ideal_nops = p6_nops;
+ break;
+ }
+ break;
+
+ case X86_VENDOR_AMD:
+ if ( boot_cpu_data.x86 > 0xf )
+ ideal_nops = p6_nops;
+ break;
+ }
}
/* Use this to add nops to a buffer, then text_poke the whole buffer. */
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