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Re: [Xen-devel] [PATCH v2 0/4] x86/cpuid: Enable new SSE/AVX/AVX512 cpu features

To: <yang.zhong@xxxxxxxxx>,<xen-devel@xxxxxxxxxxxxx>
From: "Jan Beulich" <JBeulich@xxxxxxxx>
Date: Fri, 10 Nov 2017 02:42:59 -0700
Cc: yi.y.sun@xxxxxxxxx, chao.p.peng@xxxxxxxxx, luwei.kang@xxxxxxxxx, yu.c.zhang@xxxxxxxxx
Delivery-date: Fri, 10 Nov 2017 09:43:04 +0000
List-id: Xen developer discussion <xen-devel.lists.xen.org>

>>> On 10.11.17 at 10:36, <yang.zhong@xxxxxxxxx> wrote:
> Yang Zhong (4):
>   x86/cpuid: Enable new SSE/AVX/AVX512 cpu features

The ordering is wrong - as said before, these ...

>   x86emul: Support GFNI insns
>   x86emul: Support vpclmulqdq
>   x86emul: Support vaes insns

... are supposed to be prereqs of the actual enabling of the CPUID
bits.

Jan


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References:
- [Xen-devel] [PATCH v2 0/4] x86/cpuid: Enable new SSE/AVX/AVX512 cpu features
  - From: Yang Zhong

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