diff --git a/hw/xen/xen_pt.h b/hw/xen/xen_pt.h index 191d9caea1..c296cf682c 100644 --- a/hw/xen/xen_pt.h +++ b/hw/xen/xen_pt.h @@ -10,6 +10,7 @@ void xen_pt_log(const PCIDevice *d, const char *f, ...) GCC_FMT_ATTR(2, 3); #define XEN_PT_ERR(d, _f, _a...) xen_pt_log(d, "%s: Error: "_f, __func__, ##_a) +#define XEN_PT_LOGGING_ENABLED 1 #ifdef XEN_PT_LOGGING_ENABLED # define XEN_PT_LOG(d, _f, _a...) xen_pt_log(d, "%s: " _f, __func__, ##_a) # define XEN_PT_WARN(d, _f, _a...) \ diff --git a/hw/xen/xen_pt_config_init.c b/hw/xen/xen_pt_config_init.c index 1f04ec5eec..893ac06a80 100644 --- a/hw/xen/xen_pt_config_init.c +++ b/hw/xen/xen_pt_config_init.c @@ -1482,6 +1482,7 @@ static int xen_pt_msixctrl_reg_write(XenPCIPassthroughState *s, /* update MSI-X */ if ((*val & PCI_MSIX_FLAGS_ENABLE) && !(*val & PCI_MSIX_FLAGS_MASKALL)) { + XEN_PT_LOG(&s->dev, "Enabling MSIX, setting up entries\n"); xen_pt_msix_update(s); } else if (!(*val & PCI_MSIX_FLAGS_ENABLE) && s->msix->enabled) { xen_pt_msix_disable(s); diff --git a/hw/xen/xen_pt_msi.c b/hw/xen/xen_pt_msi.c index dfb8d64654..2662eb1940 100644 --- a/hw/xen/xen_pt_msi.c +++ b/hw/xen/xen_pt_msi.c @@ -132,8 +132,9 @@ static int msi_msix_setup(XenPCIPassthroughState *s, if (is_msix) { table_base = s->msix->table_base; + XEN_PT_LOG(&s->dev, "Mapping PIRQ for MSIX entry %d\n", + msix_entry); } - rc = xc_physdev_map_pirq_msi(xen_xc, xen_domid, XEN_PT_AUTO_ASSIGN, ppirq, PCI_DEVFN(s->real_device.dev, s->real_device.func), @@ -345,6 +346,9 @@ static int xen_pt_msix_update_one(XenPCIPassthroughState *s, int entry_nr, entry->data = entry->latch(DATA); } + XEN_PT_LOG(&s->dev, "Setting up MSIX vector %d PIRQ: %d Masked: %d\n", + entry_nr, entry->pirq, vec_ctrl & PCI_MSIX_ENTRY_CTRL_MASKBIT); + rc = msi_msix_setup(s, entry->addr, entry->data, &pirq, true, entry_nr, entry->pirq == XEN_PT_UNASSIGNED_PIRQ); if (rc) { @@ -468,6 +472,10 @@ static void pci_msix_write(void *opaque, hwaddr addr, xen_pt_msix_update_one(s, entry_nr, *vec_ctrl); } + if (offset == PCI_MSIX_ENTRY_VECTOR_CTRL) + XEN_PT_LOG(&s->dev, "Write to MSIX table entry %u CTRL, masked: %d\n", + entry_nr, !!(val & PCI_MSIX_ENTRY_CTRL_MASKBIT)); + set_entry_value(entry, offset, val); }