Re: [Xen-devel] [PATCH V2 21/25] tools/libxc: Add a new interface to bind remapping format msi with pirq

[Roger Pau Monné <roger.pau@xxxxxxxxxx>]

On Fri, Aug 25, 2017 at 03:28:46PM +0800, Chao Gao wrote:
> On Wed, Aug 23, 2017 at 11:41:25AM +0100, Roger Pau Monné wrote:
> >On Wed, Aug 09, 2017 at 04:34:22PM -0400, Lan Tianyu wrote:
> >> From: Chao Gao <chao.gao@xxxxxxxxx>
> >> 
> >> Introduce a new binding relationship and provide a new interface to
> >> manage the new relationship.
> >> 
> >> Signed-off-by: Chao Gao <chao.gao@xxxxxxxxx>
> >> Signed-off-by: Lan Tianyu <tianyu.lan@xxxxxxxxx>
> >> ---
> >>          pirq_dpci->gmsi.posted = false;
> >>          vcpu = (dest_vcpu_id >= 0) ? d->vcpu[dest_vcpu_id] : NULL;
> >> -        if ( iommu_intpost )
> >> +        /* Currently, don't use interrupt posting for guest's remapping 
> >> MSIs */
> >> +        if ( iommu_intpost && !ir )
> >>          {
> >>              if ( delivery_mode == dest_LowestPrio )
> >>                  vcpu = vector_hashing_dest(d, dest, dest_mode,
> >> @@ -435,7 +527,7 @@ int pt_irq_create_bind(
> >>              hvm_migrate_pirqs(d->vcpu[dest_vcpu_id]);
> >>  
> >>          /* Use interrupt posting if it is supported. */
> >> -        if ( iommu_intpost )
> >> +        if ( iommu_intpost && !ir )
> >
> >So with interrupt remapping posted interrupts are not available...
> 
> Yes. We want to make thing simple. Currently, all vIRTE isn't
> cached by vvtd and thus we needn't do anything when guest try to flush
> vIRTE. If we use posted interrupt here, it means some information will
> be cached by physical VTd. In that case, we should push effort to flush
> correspond phyiscal IRTE. We don't include these patches in this
> series.

Might be worth adding a "FIXME".

Thanks, Roger.

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