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[Xen-devel] [PATCH] x86/tlb: Opencode the use of write_cr4() in write_cr3() and flush_area_local()



This avoids unnecessary updates to the stack shadow copy of cr4 during
critical regions with interrupts disabled.

No change in behaviour.

Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
---
CC: Jan Beulich <JBeulich@xxxxxxxx>
---
 xen/arch/x86/flushtlb.c | 19 +++++++++++++------
 1 file changed, 13 insertions(+), 6 deletions(-)

diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
index f6d7ad1..65012c9 100644
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -81,9 +81,14 @@ void write_cr3(unsigned long cr3)
 
     hvm_flush_guest_tlbs();
 
-    write_cr4(cr4 & ~X86_CR4_PGE);
-    asm volatile ( "mov %0, %%cr3" : : "r" (cr3) : "memory" );
-    write_cr4(cr4);
+    asm volatile ("mov %[npge], %%cr4;"
+                  "mov %[cr3], %%cr3;"
+                  "mov %[cr4], %%cr4;"
+                  ::
+                   [npge] "r" (cr4 & ~X86_CR4_PGE),
+                   [cr3]  "r" (cr3),
+                   [cr4]  "r" (cr4)
+                  : "memory");
 
     post_flush(t);
 
@@ -123,9 +128,11 @@ unsigned int flush_area_local(const void *va, unsigned int 
flags)
 
             hvm_flush_guest_tlbs();
 
-            write_cr4(cr4 & ~X86_CR4_PGE);
-            barrier();
-            write_cr4(cr4);
+            asm volatile ("mov %[npge], %%cr4;"
+                          "mov %[cr4], %%cr4;"
+                          ::
+                           [npge] "r" (cr4 & ~X86_CR4_PGE),
+                           [cr4]  "r" (cr4));
 
             post_flush(t);
         }
-- 
2.1.4


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