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Re: [Xen-devel] xen/arm: Software Step ARMv8 - PC stuck on instruction

Sets TDE to trap debug exceptions to EL2 from lower exception levels. I'm
surprised this isn't always set for Xen. Do you allow guests to use the debug
features for their own purposes?

No. We already trap debug exceptions to EL2 by default and MDCR_EL2 should already be configured correctly for that.

Ok my thoughts were that i just want to ensure that this bit is set.
+            WRITE_SYSREG( READ_SYSREG(DAIF) & ~0x200, DAIF);

Here I'm confused. This looks like you are clearing PSTATE.D from the DAIF
register for EL2. This means debug exceptions are unmasked for exceptions from
Xen at EL2.

If you ERET with PSTATE.D clear the SPSR.SS bit will be discarded instead. I
thin this is your bug. The rules in 'D2.12.4 Entering the active-not-pending
state' require 'Debug exceptions are disabled from the current Exception level'.

I'm definitely checking this once again.
You've set MDSCR_EL1.SS, if you also have MDSCR_EL1.KDE set you will start
single-stepping Xen once the register writes take effect, (which may be before
or after this:)

+            isb();

What are you synchronising here? (Unless you want to single-step Xen I suspect
you don't need this at all.)

Xen is been over cautious with isb at the moment :). I think this one is not necessary because you will affect EL1/EL0 context and it will be synchronized on the eret.
This was, once again, just to make sure that everything is synchronized. But I'm going to remove it if its redundant.

So as far as I understood both of you don't see a general problem with (timer) interrupts or the scheduler while being single stepped? Because in my opinion after enabling singlestep the system will go into a "spinlock" routine.

Adapting your recommendations doesn't change the behavior.
I'm still able to step over each instruction, but the control flow does not follow my module but rather executes my SMC to start SS and then enters the before mentioned procedure.

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