[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Xen-devel] [PATCH v8 RESEND 05/38] x86/CPU/AMD: Handle SME reduction in physical address size



When System Memory Encryption (SME) is enabled, the physical address
space is reduced. Adjust the x86_phys_bits value to reflect this
reduction.

Reviewed-by: Borislav Petkov <bp@xxxxxxx>
Signed-off-by: Tom Lendacky <thomas.lendacky@xxxxxxx>
---
 arch/x86/kernel/cpu/amd.c |   10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index c47ceee..5bdcbd4 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -613,15 +613,19 @@ static void early_init_amd(struct cpuinfo_x86 *c)
                set_cpu_bug(c, X86_BUG_AMD_E400);
 
        /*
-        * BIOS support is required for SME. If BIOS has not enabled SME
-        * then don't advertise the feature (set in scattered.c)
+        * BIOS support is required for SME. If BIOS has enabld SME then
+        * adjust x86_phys_bits by the SME physical address space reduction
+        * value. If BIOS has not enabled SME then don't advertise the
+        * feature (set in scattered.c).
         */
        if (cpu_has(c, X86_FEATURE_SME)) {
                u64 msr;
 
                /* Check if SME is enabled */
                rdmsrl(MSR_K8_SYSCFG, msr);
-               if (!(msr & MSR_K8_SYSCFG_MEM_ENCRYPT))
+               if (msr & MSR_K8_SYSCFG_MEM_ENCRYPT)
+                       c->x86_phys_bits -= (cpuid_ebx(0x8000001f) >> 6) & 0x3f;
+               else
                        clear_cpu_cap(c, X86_FEATURE_SME);
        }
 }


_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxx
https://lists.xen.org/xen-devel

 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.