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[Xen-devel] [PATCH v4 0/2] write_ctrlreg event masking


  • To: xen-devel@xxxxxxxxxxxxx
  • From: Petre Pircalabu <ppircalabu@xxxxxxxxxxxxxxx>
  • Date: Mon, 19 Jun 2017 15:24:37 +0300
  • Cc: tamas@xxxxxxxxxxxxx, wei.liu2@xxxxxxxxxx, rcojocaru@xxxxxxxxxxxxxxx, andrew.cooper3@xxxxxxxxxx, ian.jackson@xxxxxxxxxxxxx, jbeulich@xxxxxxxx
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  • Delivery-date: Mon, 19 Jun 2017 12:25:02 +0000
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  • List-id: Xen developer discussion <xen-devel.lists.xen.org>

This patchset enables masking the reception of write_ctrlreg events depending
on the value of certain bits in that register.
The most representative example is filtering out events when the CR4.PGE
bit is being flipped (global TLB flushes)

---
Changed since v2
  * fix coding style
  * use ARRAY_SIZE and named indexes for x86 ctrl register resolution
  * add allignment padding for xen_domctl_monitor_op

Changed since v3
  * Fix index condition in get_x86_ctrl_reg_name

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