[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v11 04/23] x86: refactor psr: L3 CAT: implement main data structures, CPU init and free flows.
On 17-05-31 03:36:43, Jan Beulich wrote: > >>> On 03.05.17 at 10:44, <yi.y.sun@xxxxxxxxxxxxxxx> wrote: > > +static void cat_init_feature(const struct cpuid_leaf *regs, > > + struct feat_node *feat, > > + struct psr_socket_info *info, > > + enum psr_feat_type type) > > +{ > > + /* No valid value so do not enable feature. */ > > + if ( !regs->a || !regs->d ) > > + return; > > + > > + feat->cbm_len = (regs->a & CAT_CBM_LEN_MASK) + 1; > > + feat->cos_max = min(opt_cos_max, regs->d & CAT_COS_MAX_MASK); > > + > > + switch ( type ) > > + { > > + case PSR_SOCKET_L3_CAT: > > + /* cos=0 is reserved as default cbm(all bits within cbm_len are > > 1). */ > > + feat->cos_reg_val[0] = cat_default_val(feat->cbm_len); > > + > > + break; > > + > > + default: > > + return; > > + } > > + > > + /* Add this feature into array. */ > > + info->features[type] = feat; > > + > > + if ( !opt_cpu_info ) > > + return; > > + > > + printk(XENLOG_INFO "%s CAT: enabled on socket %u, cos_max:%u, > > cbm_len:%u\n", > > + ((type == PSR_SOCKET_L3_CAT) ? "L3" : "L2"), > > + cpu_to_socket(smp_processor_id()), feat->cos_max, > > feat->cbm_len); > > +} > > Btw, I don't think there should be any mention of L2 CAT here just yet. > So I think you would like me to move this into L2 CAT patch, right? > Jan > > > _______________________________________________ > Xen-devel mailing list > Xen-devel@xxxxxxxxxxxxx > https://lists.xen.org/xen-devel _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx https://lists.xen.org/xen-devel
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