Re: [Xen-devel] [PATCH for-next 1/2] xen/x86/alternatives: Do not use sync_core() to serialize I$

[Juergen Gross <jgross@xxxxxxxx>]

On 22/05/17 16:17, Jan Beulich wrote:
>>>> On 22.05.17 at 15:51, <andrew.cooper3@xxxxxxxxxx> wrote:
>> On 22/05/17 14:38, Jan Beulich wrote:
>>>>>> On 19.05.17 at 20:49, <andrew.cooper3@xxxxxxxxxx> wrote:
>>>> We use sync_core() in the alternatives code to stop speculative
>>>> execution of prefetched instructions because we are potentially changing
>>>> them and don't want to execute stale bytes.
>>>>
>>>> What it does on most machines is call CPUID which is a serializing
>>>> instruction. And that's expensive.
>>>>
>>>> However, the instruction cache is serialized when we're on the local CPU
>>>> and are changing the data through the same virtual address.
>>> Do you have the background of this "same virtual address"
>>> constraint?
>>
>> There was a long LKML thread on the subject. 
>> https://lkml.org/lkml/2016/12/3/108 
> 
> Well, interesting reading (and at least part of it was Cc-ed to
> xen-devel iirc), but none of it nor ...
> 
>>> Caches are physically indexed, so I don't see the
>>> connection. Yet if there is one, our stub generation in the
>>> emulator may have an issue.
>>
>> I think https://lkml.org/lkml/2016/12/2/454 is probably the relevant
>> statement.
> 
> ... this one doesn't give any background at all of why the
> virtual address would matter here. Searching the SDM I also can't
> find any statement as to virtual or physical indexing being used
> for any of the caches.

SDM Vol. 3 chapter 11.6 (self modifying code):

A write to a memory location in a code segment that is currently cached
in the processor causes the associated
cache line (or lines) to be invalidated. This check is based on the
physical address of the instruction. In addition,
the P6 family and Pentium processors check whether a write to a code
segment may modify an instruction that has
been prefetched for execution. If the write affects a prefetched
instruction, the prefetch queue is invalidated. This
latter check is based on the linear address of the instruction.


Juergen

_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxx
https://lists.xen.org/xen-devel