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Re: [Xen-devel] [RFC PATCH 2/4] arm/mem_access: Change value of TTBCR_SZ_MASK

On 02/05/17 12:56, Julien Grall wrote:
Hi Sergej,

On 30/04/17 20:48, Sergej Proskurin wrote:
The TTBCR_SZ holds only 3 bits and thus must be masked with the value
0x7 instead of the previously used value 0xf.

Please quote the spec (paragaph + version) when you do a such change.

TTBCR_* flags are used for both TCR_EL1 (AArch64) and TTBCR (AArch32).
Looking at the spec (ARM DDI 0487A.k_iss10775) TCR_EL1.{T0SZ,T1SZ) is
encoded on 6 bits and TTBCR_EL1.{T0SZ,T1SZ} is encoded on 3 bits, with
the following 3 bits RES0.

So the mask here should be 0x3f.

Hmmm, I have just noticed we do a mix of TTBCR and TCR in the code. I would prefer if we use only TCR_* everywhere.


Julien Grall

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