Re: [Xen-devel] [PATCH v3 1/2][XTF] xtf/vpmu: Add Intel PMU MSR addresses

[Andrew Cooper <andrew.cooper3@xxxxxxxxxx>]

On 26/04/2017 07:07, Jan Beulich wrote:
>>>> On 25.04.17 at 17:24, <andrew.cooper3@xxxxxxxxxx> wrote:
>> On 24/04/17 18:54, Mohit Gambhir wrote:
>>> This patch adds Intel PMU MSR addresses as macros for VPMU testing
>>>
>>> Signed-off-by: Mohit Gambhir <mohit.gambhir@xxxxxxxxxx>
>>> ---
>>>  arch/x86/include/arch/msr-index.h | 11 +++++++++++
>>>  1 file changed, 11 insertions(+)
>>>
>>> diff --git a/arch/x86/include/arch/msr-index.h 
>> b/arch/x86/include/arch/msr-index.h
>>> index 2e90079..3a79025 100644
>>> --- a/arch/x86/include/arch/msr-index.h
>>> +++ b/arch/x86/include/arch/msr-index.h
>>> @@ -38,6 +38,17 @@
>>>  #define MSR_GS_BASE                     0xc0000101
>>>  #define MSR_SHADOW_GS_BASE              0xc0000102
>>>  
>>> +#define MSR_IA32_PMC(n)                 (0x000000c1 + (n))
>>> +#define MSR_IA32_PERFEVTSEL(n)          (0x00000186 + (n))
>>> +#define MSR_IA32_DEBUGCTL                0x000001d9
>> I have just recently pushed the LBR/TSX test case, which adds DEBUGCTL.
>>
>>> +#define MSR_IA32_FIXED_CTR(n)           (0x00000309 + (n))
>>> +#define MSR_IA32_PERF_CAPABILITIES       0x00000345
>>> +#define MSR_IA32_FIXED_CTR_CTRL          0x0000038d
>>> +#define MSR_IA32_PERF_GLOBAL_CTRL        0x0000038f
>>> +#define MSR_IA32_PERF_GLOBAL_STATUS      0x0000038e
>>> +#define MSR_IA32_PERF_GLOBAL_OVF_CTRL    0x00000390
>>> +#define MSR_IA32_A_PMC(n)               (0x000004c1 + (n))
>> Please drop the IA32 infixes.  They only add extra clutter.  Please also
>> keep the entire file sorted by MSR index, which will require splitting
>> this block into two.
> Are you sure about this? The infix helps distinguish architectural
> from non-architectural MSRs (which arguably is a questionable
> distinction by itself, considering what MSR stands for).

The IA32 infix isn't useful because it isn't used consistently; this is
a side effect of being Intel-specific notation, and changes over time. 
(For example, have you ever seen MSR_IA32_STAR referred to by its Intel
name?)

Currently, the only two MSRs used by the common XTF code are MSR_EFER
and the hypercall writing MSR as found in the Xen CPUID leaves.  I don't
expect this to really change, meaning that all MSR use is local to the
test in question, and that is in a better position to know how/when to
use them.

~Andrew

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