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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH for-4.9] x86/vioapic: allow holes in the GSI range for PVH Dom0
On Mon, Apr 17, 2017 at 05:09:22PM +0100, Roger Pau Monne wrote:
> The current vIO APIC for PVH Dom0 doesn't allow non-contiguous GSIs, which
> means that all GSIs must belong to an IO APIC. This doesn't match reality,
> where there are systems with non-contiguous GSIs.
>
> In order to fix this add a base_gsi field to each hvm_vioapic struct, in order
> to store the base GSI for each emulated IO APIC. For PVH Dom0 those values are
> populated based on the hardware ones.
>
> Signed-off-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>
> Reported-by: Chao Gao <chao.gao@xxxxxxxxx>
For consistency I think the following chunk should also be merged into it, now
that Xen can get the base GSI from the vIO APIC struct itself.
Roger.
---8<---
diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c
index db9be87612..020c355faf 100644
--- a/xen/arch/x86/hvm/dom0_build.c
+++ b/xen/arch/x86/hvm/dom0_build.c
@@ -719,7 +719,7 @@ static int __init pvh_setup_acpi_madt(struct domain *d,
paddr_t *addr)
io_apic->header.length = sizeof(*io_apic);
io_apic->id = domain_vioapic(d, i)->id;
io_apic->address = domain_vioapic(d, i)->base_address;
- io_apic->global_irq_base = io_apic_gsi_base(i);
+ io_apic->global_irq_base = domain_vioapic(d, i)->base_gsi;
io_apic++;
}
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