[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v10 18/25] x86: L2 CAT: implement CPU init and free flow.
>>> On 13.04.17 at 10:12, <yi.y.sun@xxxxxxxxxxxxxxx> wrote: > On 17-04-12 09:18:51, Jan Beulich wrote: >> >>> On 01.04.17 at 15:53, <yi.y.sun@xxxxxxxxxxxxxxx> wrote: >> > @@ -304,10 +305,14 @@ static void cat_init_feature(const struct cpuid_leaf > *regs, >> > switch ( type ) >> > { >> > case PSR_SOCKET_L3_CAT: >> > + case PSR_SOCKET_L2_CAT: >> > /* cos=0 is reserved as default cbm(all bits within cbm_len are > 1). */ >> > feat->cos_reg_val[0] = cat_default_val(feat->props->cbm_len); >> > >> > - feat->props->type[0] = PSR_CBM_TYPE_L3; >> > + if ( type == PSR_SOCKET_L3_CAT ) >> > + feat->props->type[0] = PSR_CBM_TYPE_L3; >> > + else >> > + feat->props->type[0] = PSR_CBM_TYPE_L2; >> >> Can I talk you into preferring conditional expressions in case like >> this or ... >> >> > @@ -315,7 +320,11 @@ static void cat_init_feature(const struct cpuid_leaf >> > *regs, >> > */ >> > for ( i = 1; i <= feat->props->cos_max; i++ ) >> > { >> > - wrmsrl(MSR_IA32_PSR_L3_MASK(i), feat->cos_reg_val[0]); >> > + if ( type == PSR_SOCKET_L3_CAT ) >> > + wrmsrl(MSR_IA32_PSR_L3_MASK(i), feat->cos_reg_val[0]); >> > + else >> > + wrmsrl(MSR_IA32_PSR_L2_MASK(i), feat->cos_reg_val[0]); >> >> ... this? >> > I think you mean '?:', right? Yes, that's what "conditional expression" is according to the C standard. Jan _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx https://lists.xen.org/xen-devel
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