[Xen-devel] Code freeze exception for Xen 4.9 ARM ITS emulation?

[Andre Przywara <andre.przywara@xxxxxxx>]

Hello!

The development of the ARM ITS emulation support has taken more time
than anticipated and I won't be able to address and fix all outstanding
comments until the official code freeze date.

However the first part of the series is in a good shape and should be
ready to be merged in time.

I was wondering if I could be granted a brief code freeze exception for
the remaining part of the series?
I would address the outstanding issues until Thursday, April 13th and
would post (a) new version(s) on the ML by then.
Needless to say, that regardless of this, I will be promptly reacting
and fixing and potential regressions introduced by the series.

The idea would be to split the series and merge the first patches by the
code freeze.
I would then address the remaining comments and the second part of the
series, consisting of patches to new files, could be merged by next
week.
I tuned the common code to make sure we only enter new code paths
if the code is compiled in and the machine actually has the ITS
hardware, to minimize the risk of breaking existing setups.


Rationale for the exception:
------------------------------
- This feature is a technical preview, disabled by default and
requiring the EXPERT Kconfig option to be actually compiled in.
- There is a strong interest from various parties to have the ITS
emulation support in the Xen 4.9 release. Without the ITS a number of
ARM servers will not be able to use MSIs (even in Dom0), which would
prevent some systems from using PCI devices at all.
- Xen's architecture requires the ITS emulation code to be usable for
Dom0 already, so this is not about device passthrough to DomUs, but
about to get PCI devices running. At the moment some servers can't use
any network or block storage devices in Dom0, which would be fixed by
this series.
- The technical preview would allow various people to easily test this
code, helping to gain confidence in this and to find potential bugs.


Potential risks:
----------------
- The code touches existing GIC emulation code, which is used by all ARM
machines so far. However the ITS is an extension to the GICv3 interrupt
controller, so the new code will be mostly adding functions, and changes
existing code only in a very few places. Most (if not all) of those
points can be secured by a gating variable (d->arch.vgic.has_its), which
would never be set when the code is not configured in or the machine is
not using the ITS.

Please let me know if you need further information or I can be of more
assistance!

Thank you very much!

Cheers,
Andre.

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