Re: [Xen-devel] [PATCH v2] x86/vpmu_intel: Handle SMT consistently for programmable and fixed counters

["Tian, Kevin" <kevin.tian@xxxxxxxxx>]

> From: Mohit Gambhir [mailto:mohit.gambhir@xxxxxxxxxx]
> Sent: Thursday, April 6, 2017 3:50 AM
> 
> The patch introduces a macro FIXED_CTR_CTRL_ANYTHREAD_MASK and uses
> it
> to mask .Anythread bit for all counter in IA32_FIXED_CTR_CTRL MSR in all
> versions of Intel Arhcitectural Performance Monitoring.  Masking .AnyThread
> bit
>  is necesssry for two reasons:
> 
> 1. We need to be consistent in the implementation. We disable .Anythread
> bit in
> programmable counters (regardless of the version) by masking bit 21 in
> IA32_PERFEVTSELx.  (See code snippet below from vpmu_intel.c)
> 
>  /* Masks used for testing whether and MSR is valid */
>  #define ARCH_CTRL_MASK  (~((1ull << 32) - 1) | (1ull << 21))
> 
> But we leave it enabled in fixed function counters for version 3. Removing
> the
> condition disables the bit in fixed function counters regardless of the 
> version,
> which is consistent with what is done for programmable counters.
> 
> 2. We don't want to expose event counts from another guest (or hypervisor)
> which can happen if .AnyThread bit is not masked and a VCPU is only
> scheduled
> to run on one of the hardware threads in a hyper-threaded CPU.
> 
> Also, note that Intel SDM discourages the  use of .AnyThread bit in 
> virtualized
>  environments (per section 18.2.3.1 AnyThread Counting and Software
> Evolution).
> 
> Signed-off-by: Mohit Gambhir <mohit.gambhir@xxxxxxxxxx>

Reviewed-by: Kevin Tian <kevin.tian@xxxxxxxxx>

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