|
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [xen-unstable baseline-only test] 68644: regressions - trouble: blocked/broken/fail/pass
This run is configured for baseline tests only. flight 68644 xen-unstable real [real] http://osstest.xs.citrite.net/~osstest/testlogs/logs/68644/ Regressions :-( Tests which did not succeed and are blocking, including tests which could not be run: test-amd64-amd64-libvirt 14 guest-saverestore fail REGR. vs. 68642 test-amd64-amd64-xl-qemut-winxpsp3 6 xen-boot fail REGR. vs. 68642 Regressions which are regarded as allowable (not blocking): test-armhf-armhf-libvirt-xsm 13 saverestore-support-check fail like 68642 test-armhf-armhf-libvirt 13 saverestore-support-check fail like 68642 test-armhf-armhf-libvirt-raw 12 saverestore-support-check fail like 68642 test-amd64-amd64-qemuu-nested-intel 16 debian-hvm-install/l1/l2 fail like 68642 test-amd64-i386-xl-qemuu-win7-amd64 16 guest-stop fail like 68642 test-amd64-i386-xl-qemut-winxpsp3-vcpus1 9 windows-install fail like 68642 test-amd64-i386-xl-qemuu-winxpsp3-vcpus1 9 windows-install fail like 68642 Tests which did not succeed, but are not blocking: test-arm64-arm64-libvirt-xsm 1 build-check(1) blocked n/a test-arm64-arm64-xl 1 build-check(1) blocked n/a build-arm64-libvirt 1 build-check(1) blocked n/a test-arm64-arm64-libvirt-qcow2 1 build-check(1) blocked n/a test-arm64-arm64-libvirt 1 build-check(1) blocked n/a test-arm64-arm64-xl-credit2 1 build-check(1) blocked n/a test-arm64-arm64-xl-rtds 1 build-check(1) blocked n/a test-arm64-arm64-xl-multivcpu 1 build-check(1) blocked n/a test-arm64-arm64-xl-xsm 1 build-check(1) blocked n/a build-arm64-xsm 2 hosts-allocate broken never pass build-arm64 2 hosts-allocate broken never pass build-arm64-pvops 2 hosts-allocate broken never pass build-arm64-xsm 3 capture-logs broken never pass build-arm64 3 capture-logs broken never pass build-arm64-pvops 3 capture-logs broken never pass test-armhf-armhf-libvirt-xsm 12 migrate-support-check fail never pass test-armhf-armhf-xl-xsm 12 migrate-support-check fail never pass test-armhf-armhf-xl-xsm 13 saverestore-support-check fail never pass test-armhf-armhf-libvirt 12 migrate-support-check fail never pass test-armhf-armhf-xl-midway 12 migrate-support-check fail never pass test-armhf-armhf-xl-multivcpu 12 migrate-support-check fail never pass test-armhf-armhf-xl-midway 13 saverestore-support-check fail never pass test-armhf-armhf-xl-multivcpu 13 saverestore-support-check fail never pass test-amd64-amd64-xl-pvh-intel 11 guest-start fail never pass test-amd64-amd64-xl-pvh-amd 11 guest-start fail never pass test-armhf-armhf-xl 12 migrate-support-check fail never pass test-armhf-armhf-xl 13 saverestore-support-check fail never pass test-amd64-amd64-libvirt-xsm 12 migrate-support-check fail never pass test-amd64-i386-libvirt 12 migrate-support-check fail never pass test-amd64-amd64-libvirt 12 migrate-support-check fail never pass test-amd64-i386-libvirt-xsm 12 migrate-support-check fail never pass test-armhf-armhf-xl-rtds 12 migrate-support-check fail never pass test-armhf-armhf-xl-rtds 13 saverestore-support-check fail never pass test-armhf-armhf-libvirt-raw 11 migrate-support-check fail never pass test-armhf-armhf-xl-vhd 11 migrate-support-check fail never pass test-armhf-armhf-xl-vhd 12 saverestore-support-check fail never pass test-amd64-i386-libvirt-qemuu-debianhvm-amd64-xsm 10 migrate-support-check fail never pass test-amd64-amd64-libvirt-qemuu-debianhvm-amd64-xsm 10 migrate-support-check fail never pass test-amd64-amd64-qemuu-nested-amd 16 debian-hvm-install/l1/l2 fail never pass test-amd64-amd64-xl-qemut-win7-amd64 16 guest-stop fail never pass test-amd64-amd64-libvirt-vhd 11 migrate-support-check fail never pass test-armhf-armhf-xl-credit2 12 migrate-support-check fail never pass test-armhf-armhf-xl-credit2 13 saverestore-support-check fail never pass test-amd64-i386-xl-qemut-win7-amd64 16 guest-stop fail never pass test-amd64-amd64-xl-qemuu-win7-amd64 16 guest-stop fail never pass version targeted for testing: xen 4036e7c592905c2292cdeba8269e969959427237 baseline version: xen caf053fb545329e58ac891d197f96503e3121049 Last test of basis 68642 2017-03-07 15:13:58 Z 1 days Testing same since 68644 2017-03-08 08:44:00 Z 0 days 1 attempts ------------------------------------------------------------ People who touched revisions under test: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Jan Beulich <jbeulich@xxxxxxxx> Roger Pau Monné <roger.pau@xxxxxxxxxx> jobs: build-amd64-xsm pass build-arm64-xsm broken build-armhf-xsm pass build-i386-xsm pass build-amd64-xtf pass build-amd64 pass build-arm64 broken build-armhf pass build-i386 pass build-amd64-libvirt pass build-arm64-libvirt blocked build-armhf-libvirt pass build-i386-libvirt pass build-amd64-oldkern pass build-i386-oldkern pass build-amd64-prev pass build-i386-prev pass build-amd64-pvops pass build-arm64-pvops broken build-armhf-pvops pass build-i386-pvops pass build-amd64-rumprun pass build-i386-rumprun pass test-xtf-amd64-amd64-1 pass test-xtf-amd64-amd64-2 pass test-xtf-amd64-amd64-3 pass test-xtf-amd64-amd64-4 pass test-xtf-amd64-amd64-5 pass test-amd64-amd64-xl pass test-arm64-arm64-xl blocked test-armhf-armhf-xl pass test-amd64-i386-xl pass test-amd64-amd64-xl-qemut-debianhvm-amd64-xsm pass test-amd64-i386-xl-qemut-debianhvm-amd64-xsm pass test-amd64-amd64-libvirt-qemuu-debianhvm-amd64-xsm pass test-amd64-i386-libvirt-qemuu-debianhvm-amd64-xsm pass test-amd64-amd64-xl-qemuu-debianhvm-amd64-xsm pass test-amd64-i386-xl-qemuu-debianhvm-amd64-xsm pass test-amd64-amd64-xl-qemut-stubdom-debianhvm-amd64-xsm pass test-amd64-i386-xl-qemut-stubdom-debianhvm-amd64-xsm pass test-amd64-amd64-libvirt-xsm pass test-arm64-arm64-libvirt-xsm blocked test-armhf-armhf-libvirt-xsm pass test-amd64-i386-libvirt-xsm pass test-amd64-amd64-xl-xsm pass test-arm64-arm64-xl-xsm blocked test-armhf-armhf-xl-xsm pass test-amd64-i386-xl-xsm pass test-amd64-amd64-qemuu-nested-amd fail test-amd64-amd64-xl-pvh-amd fail test-amd64-i386-qemut-rhel6hvm-amd pass test-amd64-i386-qemuu-rhel6hvm-amd pass test-amd64-amd64-xl-qemut-debianhvm-amd64 pass test-amd64-i386-xl-qemut-debianhvm-amd64 pass test-amd64-amd64-xl-qemuu-debianhvm-amd64 pass test-amd64-i386-xl-qemuu-debianhvm-amd64 pass test-amd64-i386-freebsd10-amd64 pass test-amd64-amd64-xl-qemuu-ovmf-amd64 pass test-amd64-i386-xl-qemuu-ovmf-amd64 pass test-amd64-amd64-rumprun-amd64 pass test-amd64-amd64-xl-qemut-win7-amd64 fail test-amd64-i386-xl-qemut-win7-amd64 fail test-amd64-amd64-xl-qemuu-win7-amd64 fail test-amd64-i386-xl-qemuu-win7-amd64 fail test-amd64-amd64-xl-credit2 pass test-arm64-arm64-xl-credit2 blocked test-armhf-armhf-xl-credit2 pass test-amd64-i386-freebsd10-i386 pass test-amd64-i386-rumprun-i386 pass test-amd64-amd64-qemuu-nested-intel fail test-amd64-amd64-xl-pvh-intel fail test-amd64-i386-qemut-rhel6hvm-intel pass test-amd64-i386-qemuu-rhel6hvm-intel pass test-amd64-amd64-libvirt fail test-arm64-arm64-libvirt blocked test-armhf-armhf-libvirt pass test-amd64-i386-libvirt pass test-armhf-armhf-xl-midway pass test-amd64-amd64-migrupgrade pass test-amd64-i386-migrupgrade pass test-amd64-amd64-xl-multivcpu pass test-arm64-arm64-xl-multivcpu blocked test-armhf-armhf-xl-multivcpu pass test-amd64-amd64-pair pass test-amd64-i386-pair pass test-amd64-amd64-libvirt-pair pass test-amd64-i386-libvirt-pair pass test-amd64-amd64-amd64-pvgrub pass test-amd64-amd64-i386-pvgrub pass test-amd64-amd64-pygrub pass test-arm64-arm64-libvirt-qcow2 blocked test-amd64-amd64-xl-qcow2 pass test-armhf-armhf-libvirt-raw pass test-amd64-i386-xl-raw pass test-amd64-amd64-xl-rtds pass test-arm64-arm64-xl-rtds blocked test-armhf-armhf-xl-rtds pass test-amd64-i386-xl-qemut-winxpsp3-vcpus1 fail test-amd64-i386-xl-qemuu-winxpsp3-vcpus1 fail test-amd64-amd64-libvirt-vhd pass test-armhf-armhf-xl-vhd pass test-amd64-amd64-xl-qemut-winxpsp3 fail test-amd64-i386-xl-qemut-winxpsp3 pass test-amd64-amd64-xl-qemuu-winxpsp3 pass test-amd64-i386-xl-qemuu-winxpsp3 pass ------------------------------------------------------------ sg-report-flight on osstest.xs.citrite.net logs: /home/osstest/logs images: /home/osstest/images Logs, config files, etc. are available at http://osstest.xs.citrite.net/~osstest/testlogs/logs Test harness code can be found at http://xenbits.xensource.com/gitweb?p=osstest.git;a=summary broken-step build-arm64-xsm hosts-allocate broken-step build-arm64 hosts-allocate broken-step build-arm64-pvops hosts-allocate broken-step build-arm64-xsm capture-logs broken-step build-arm64 capture-logs broken-step build-arm64-pvops capture-logs Push not applicable. ------------------------------------------------------------ commit 4036e7c592905c2292cdeba8269e969959427237 Author: Roger Pau Monné <roger.pau@xxxxxxxxxx> Date: Tue Mar 7 17:11:06 2017 +0100 x86: drop unneeded __packed attributes There where a couple of unneeded packed attributes in several x86-specific structures, that are obviously aligned. The only non-trivial one is vmcb_struct, which has been checked to have the same layout with and without the packed attribute using pahole. In that case add a build-time size check to be on the safe side. No functional change is expected as a result of this commit. Signed-off-by: Roger Pau Monné <roger.pau@xxxxxxxxxx> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Boris Ostrovsky <boris.ostrovsky@xxxxxxxxxx> commit fe39a9ffcd9876dbfcf3852fed758d8533f826bb Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Tue Mar 7 17:10:33 2017 +0100 x86emul: support SHA insns Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> commit b732d9991056b8b8c0050079ab65ce7e06d70fb6 Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Tue Mar 7 17:10:07 2017 +0100 x86emul: support AESNI insns ... and their AVX equivalents. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> commit 984da9ff98649586c6e4d26fa96ee2e4fc1112b3 Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Tue Mar 7 17:09:30 2017 +0100 x86emul: support PCLMULQDQ ... and its AVX equivalent. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> commit 92a47d77e168eac85c440126e3009728eb579cdd Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Tue Mar 7 17:09:09 2017 +0100 x86emul: test coverage for SSE3/SSSE3/SSE4* insns ... and their AVX equivalents. Note that a few instructions aren't covered (yet), but those all fall into common pattern groups, so I would hope that for now we can do with what is there. Just like for SSE/SSE2, MMX insns aren't being covered at all, as they're not easy to deal with: The compiler refuses to emit such for other than uses of built-in functions. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Acked-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> commit 175fcf2b489cb0caa98b5211b7da145b5cf29c42 Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Tue Mar 7 17:08:47 2017 +0100 x86emul: support SSE4.2 insns ... and their AVX equivalents. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> commit 2ea85993ebe5a90ec24b7495401a82541d8d5286 Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Tue Mar 7 17:08:19 2017 +0100 x86emul: support SSE4.1 insns ... and their AVX equivalents. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> commit 606311669600c4dc711e93a2237272d27fb9935e Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Tue Mar 7 17:07:52 2017 +0100 x86emul: support SSSE3 insns ... and their AVX equivalents. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> commit 9f7f5f6bc95b78d757c3fe6444ce23efded03f3c Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Tue Mar 7 17:07:25 2017 +0100 x86emul: add tables for 0f38 and 0f3a extension space Convert the few existing opcodes so far supported. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> commit 1600a5adfd4f50fdc03fe867e3a3a28d9d8be902 Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Tue Mar 7 17:07:00 2017 +0100 x86emul: honor MMXEXT feature flag This being a strict (MMX register only) subset of SSE, we can simply adjust the respective checks while making the new predicate look at both flags. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> commit fbd826bd874663d4e6c5a7222695c7827bc5ea9f Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Tue Mar 7 17:06:38 2017 +0100 x86emul: test coverage for SSE/SSE2 insns ... and their AVX equivalents. Note that a few instructions aren't covered (yet), but those all fall into common pattern groups, so I would hope that for now we can do with what is there. MMX insns aren't being covered at all, as they're not easy to deal with: The compiler refuses to emit such for other than uses of built-in functions. The current way of testing AVX insns is meant to be temporary only: Once we fully support that feature, the present tests should rather be replaced than full ones simply added. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Acked-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> commit 50b73118d5b5dc57dbd992fbeb7cfb1cc965be24 Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Tue Mar 7 17:05:47 2017 +0100 x86emul: support {,V}MOVNTDQA ... as the only post-SSE2 move insn. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> commit 9a4496a35b206729f9a8218104bc7e76df74ff05 Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Tue Mar 7 17:05:24 2017 +0100 x86emul: support {,V}{LD,ST}MXCSR Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> commit eb705cc741ca024f92713fb7251bf748a012fedf Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Tue Mar 7 17:04:57 2017 +0100 x86emul: support MMX/SSE{,2,4a} insns with only register operands Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> commit 1257897bd118dc7dfdb3f6f7d0957c1f4c4d2ce5 Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Tue Mar 7 17:04:31 2017 +0100 x86emul: support {,V}{,U}COMIS{S,D} Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> commit 0e14179881fcbb4534ed6baf462f3a3d54a4ad28 Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Tue Mar 7 17:04:08 2017 +0100 x86emul: support MMX/SSE/SSE2 converts Note that other than most scalar instructions, vcvt{,t}s{s,d}2si do #UD when VEX.l is set on at least some Intel models. To be on the safe side, implement the most restrictive mode here for now when emulating an Intel CPU, and simply clear the bit when emulating an AMD one. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> commit 6ce8724d4da37ad2c6e0cff4ce9edf2568602025 Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Tue Mar 7 17:03:45 2017 +0100 x86emul: support MMX/SSE{,2,3} moves Previously supported insns are being converted to the new model, and several new ones are being added. To keep the stub handling reasonably simple, integrate SET_SSE_PREFIX() into copy_REX_VEX(), at once switching the stubs to use an empty REX prefix instead of a double DS: one (no byte registers are being accessed, so an empty REX prefix has no effect), except (of course) for the 32-bit test harness build. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> commit 272e928f498705064bd6cf17d12158645ee7819e Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Tue Mar 7 17:02:53 2017 +0100 x86emul: support most memory accessing MMX/SSE{,2,3} insns This aims at covering most MMX/SSEn/AVX instructions in the 0x0f-escape space with memory operands. Not covered here are irregular moves, converts, and {,U}COMIS{S,D} (modifying EFLAGS). Note that the distinction between simd_*_fp isn't strictly needed, but I've kept them as separate entries since in an earlier version I needed them to be separate, and we may well find it useful down the road to have that distinction. Also take the opportunity and adjust the vmovdqu test case the new LDDQU one here has been cloned from: To zero a ymm register we don't need to go through hoops, as 128-bit AVX insns zero the upper portion of the destination register, and in the disabled AVX2 code there was a wrong YMM register used. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> (qemu changes not included) _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx https://lists.xen.org/xen-devel
|
 |
Lists.xenproject.org is hosted with RackSpace, monitoring our |