Re: [Xen-devel] [PATCH v4 03/17] x86emul: support MMX/SSE/SSE2 converts

[Andrew Cooper <andrew.cooper3@xxxxxxxxxx>]

On 28/02/17 12:51, Jan Beulich wrote:
> Note that other than most scalar instructions, vcvt{,t}s{s,d}2si do #UD
> when VEX.l is set on at least some Intel models. To be on the safe
> side, implement the most restrictive mode here for now when emulating
> an Intel CPU, and simply clear the bit when emulating an AMD one.
>
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>

Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>

> @@ -5560,6 +5656,24 @@ x86_emulate(
>          dst.bytes = 4;
>          break;
>  
> +    CASE_SIMD_ALL_FP(, 0x0f, 0x5a):        /* cvt{p,s}{s,d}2{p,s}{s,d} 
> xmm/mem,xmm */
> +    CASE_SIMD_ALL_FP(_VEX, 0x0f, 0x5a):    /* vcvtp{s,d}2p{s,d} xmm/mem,xmm 
> */
> +                                           /* vcvts{s,d}2s{s,d} 
> xmm/mem,xmm,xmm */
> +        op_bytes = 4 << (((vex.pfx & VEX_PREFIX_SCALAR_MASK) ? 0 : 1 + 
> vex.l) +
> +                         !!(vex.pfx & VEX_PREFIX_DOUBLE_MASK));

:( My head hurts.

> +    simd_0f_cvt:
> +        if ( vex.opcx == vex_none )
> +            goto simd_0f_sse2;
> +        goto simd_0f_avx;
> +
> +    CASE_SIMD_PACKED_FP(, 0x0f, 0x5b):     /* cvt{ps,dq}2{dq,ps} xmm/mem,xmm 
> */
> +    CASE_SIMD_PACKED_FP(_VEX, 0x0f, 0x5b): /* vcvt{ps,dq}2{dq,ps} 
> {x,y}mm/mem,{x,y}mm */
> +    case X86EMUL_OPC_F3(0x0f, 0x5b):       /* cvttps2dq xmm/mem,xmm */
> +    case X86EMUL_OPC_VEX_F3(0x0f, 0x5b):   /* vcvttps2dq {x,y}mm/mem,{x,y}mm 
> */
> +        d |= TwoOp;
> +        op_bytes = 16 << vex.l;
> +        goto simd_0f_cvt;
> +
>      CASE_SIMD_PACKED_INT(0x0f, 0x60):    /* punpcklbw {,x}mm/mem,{,x}mm */
>      case X86EMUL_OPC_VEX_66(0x0f, 0x60): /* vpunpcklbw 
> {x,y}mm/mem,{x,y}mm,{x,y}mm */
>      CASE_SIMD_PACKED_INT(0x0f, 0x61):    /* punpcklwd {,x}mm/mem,{,x}mm */


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